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Original question:

ADS1278: Reading data in SPI fixed mode

ADS1278: Daisy-Chained ADS1278 & AS 1178: ADS1278 just gives bad data and doesn't transmit out DIN data.

Wendall Siemens
Prodigy 50 points
Part Number: ADS1278
Other Parts Discussed in Thread: ADS1178, , ADS1274, ADS1174

I have two daisy-chained ADCs on a board and cannot get the ADS1278 to give any good data or transfer any data from the ADS1178 behind it. When I reverse the order, the ADS1178 sends its data fine, and then the gibberish the the ADS1278 sends it. It is almost like the ADS1278 is in modulator mode. Setup below:

CLKDIV : 1

Mode[1:0] : 1,1  (Also tried 0,1)

Format[2:0] : 0,0,1

Test[1:0] : 0,0 

CLK; 24 MHz

The ADS1178 setup is the same except for no Mode 1.

Power up sequence: 1.8, 3.3 and 5 V all start at the same time and have the same slope such that 1.8 and 3.3 reach the 1 volt threshold first, and the 5 volt reaches the 3 volt threshold about 6 ms later. I've tried holding off on the clock until after the startup, but no change in the data stream. I've tried this on 2 separate boards and both ADS1278 ADCs are exhibit the same behavior while the ADS1178s both work.

Any thoughts on what is going on here?

Thanks

  • 0
    TI__Guru 62765 points

    Hello Wendall,

    Theoretically, the output shift registers are just data buffers shifting bit by bit, so if things are set up correctly it shouldn’t matter that one device is 24-bits and the other is 16.  While we don't see this combination as commonly, we can firmly confirm that different channel counts can be daisy-chained together.

    Are the two devices synchronized properly with exactly the same data rate? The two modes mentioned for the ADS1278 don’t give the same data rates.

     

    ADS1274/78

    Mode[1:0]

    Mode Selection

    CLKDIV

    Max fCLK

    (MHz)

    fMOD

    Max fMOD

    (MHz)

    OSR

    fCLK/fDATA

    Max fDATA

    (SPS)

    00

    High-Speed

    1

    37

    fCLK/4

    9.25

    64

    256

    144,531

    01

    High-Resolution

    1

    27

    fCLK/4

    6.75

    128

    512

    52,734

    10

    Low-Power

    1

    0

    27

    13.5

    fCLK/8

    fCLK/4

    3.375

    64

    64

    512

    256

    52,734

    11

    Low-Speed

    1

    0

    27

    5.4

    fCLK/40

    fCLK/8

    0.675

    64

    64

    2,560

    512

    10,547

     

    ADS1174/78

    Mode

    Mode Selection

    CLKDIV

    Max fCLK

    (MHz)

    fMOD

    Max fMOD

    (MHz)

    OSR

    fCLK/fDATA

    Max fDATA

    (SPS)

    0

    High-Speed

    1

    0

    27

    13.5

    fCLK/8

    fCLK/4

    3.375

    64

    64

    512

    256

    52,734

     

    1

    Low-Power

    1

    0

    27

    5.4

    fCLK/40

    fCLK/8

    0.675

    64

    64

    2,560

    512

    10,547
  • 0 in reply to Collin Wells
    Prodigy 50 points

    Both devices run on the same clock as well as the sync pulse, and are read by the same SPI Clock. When the ADS1278 is first, I can see the data shifted out of the ADS1178 behind it, but it doesn't match what the ADS1178 shifts out after its own data. This is what makes me think it is somehow going into modulator mode. When I run the ADS1178 first, It shifts out the correct data from the ADS1278 after its own, however, the data doesn't seem to represent what we have on the analog inputs when divided into 8 24bit words.

  • 0 in reply to Wendall Siemens
    Prodigy 50 points

    Correction ... When the ADS1278 is first, I can see the data shifted out of the ADS1178 behind it, but it doesn't match what the ADS1278 shifts out after its own data.

  • 0 in reply to Wendall Siemens
    TI__Guru 62765 points

    Hi Wendall,

    We dug around a little bit and while we didn't find anything that says mixing the 16-bit and 24-bit devices together shouldn't work, there's also nothing saying that it does work.  Don't worry, let's dig deeper as there may be something else going on like you're suspecting.  Would it be possible to share some waveforms of the digital communication for our review?  Please try to capture the whole frame and then zoom-in over a few sections if the whole frame is too zoomed out to easily review.  

  • 0 in reply to Collin Wells
    Prodigy 50 points

    Hi Collin,

    I'll try and grab screen shots tomorrow. I don't believe though that it is anything to do with the data transfer. That seems to be working fine. Even when I run the ADS1278 alone, I get weird data. Some how I have 2 "bad" ics, or they are powering up into the wrong mode.

    Have you had any other power up issues with the ADS1278? How critical is the powerup timing on this device?

    Thanks

  • 0 in reply to Wendall Siemens
    TI__Guru 62765 points

    Thanks Wendall.

    It's pretty unlikely that you received bad ICs as this is a very popular device.

    The recommended power-up timing should be abided by, are the hardware control pins in the proper driven state at power-up?

    -Collin

  • 0 in reply to Collin Wells
    Prodigy 50 points

    I finally got back on this project and found I had a jumper issue, so it wasn't in the low power mode. Fixed that, and then it worked.

    Thanks 

  • 0 in reply to Wendall Siemens
    TI__Guru 62765 points

    Thank you for the updates.  The resulting mismatched datarates and power modes would explain this.

    Thanks!