Other Parts Discussed in Thread: DAC1280, OPA211
Hi there,
We are debugging a weird problem related to DAC 1280 and wondering if anyone has seen a similar problem.
Basically, we are using a FPGA to generate a digital bit stream for the DAC 1280 to generate a sine wave. The sine wave looks good most of the time, but sometimes on power up, the sine wave is clipped (one side of the peaks are flattened out) due to a DC offset, but the amplitude and frequency are unchanged. If we toggles the nPWDN signal to shut down the DAC and turn the DAC back on again, at most of the time the sine wave would be corrected again.
Later on we found that "powering up" is not an essential step to reproduce this. We could have the DAC powered up in a "good" condition so the sine wave is good, then just toggles the nPWDN signal to make the sine wave go bad. Of course, when it's bad, we can toggle the nPWDN again and it may be good again.
When we were toggling the nPWDN signal, the same digital bit stream are still driving the DAC. The nSYNC were tightened to high and Gain select pins were set to "000".
Could it be that we need to SYNC the bit stream after the nPWDN was toggled to high again? or could it be that we should change the bit stream to a sequence of "10101010" when the nPWDN signal is toggled to '0'? Or it's just a bug in the DAC device?
Appreciated!
Hua