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ADS52J90EVM: ADC register readback not working over SPI - Part 2

Part Number: ADS52J90EVM
Other Parts Discussed in Thread: ADS52J90, , ADS5294EVM

My original thread had been locked before I found a solution to my problem. See the post for the full background.

https://e2e.ti.com/support/data-converters/f/73/p/892927/3320071#3320071?jktype=e2e

To summarize, I'm having trouble communicating with the ADS52J90 chip on the ADS52J90EVM board. I do NOT have the TI supported host FPGA cards (TSW14J56EVM or TSW1400) connected. Instead I'm connecting the ADS52J90EVM to a ZC706 board. I'm using the FTDI D2XX library and some C code to control the SPI bus in a bit bang mode. I'm fully aware that I will need to setup all the register settings in the ADC and clock distribution chip myself without the supported host boards. However, I can't get the ADC to read back any registers to confirm that my register writes are correct.

My test is the following.

1. Write address 0x00 = 0x0001 to reset the ADC chip

2. Write address 0x0A = 0x3000 to initialize the ADC chip. This step is specified in the ADS52J90 datasheet.

3. Write address 0x01 = 0x0094 as a test of the register writes. This should configure the ADC into 16 channel input mode.

4. Write address 0x00 = 0x0001 to enable register readback mode.

5. Read address 0x01. 

6. Read address 0x00.

The problem is that every read that I perform, I only see SDOUT (SPI-MISO) as 0. I have the SPI bus pins probed with a logic analyzer to confirm the transaction is according to the datasheet. I have even double checked that the logic analyzer is reading the SDOUT test point correctly by probing with an oscilloscope.

I suspected two things in my original thread that I have since tested.

1. Maybe the ADS52J90 requires a system clock for the registers to work properly.

I connected a signal generator with an 80 MHz clock output to J75 SMA input of the ADS52J90EVM. I reran my SPI test and got the same result. SDOUT always reads back 0.

2. Maybe the ADS52J90 has a minimum SCLK speed even though it is not listed in the datasheet.

My original test used a python script to bit bang the SPI transactions and it ran very slowly. SCLK was around a few kHz. I have since updated my test code to C and use the FTDI D2XX library. SCLK is now running around 3 MHz, which is less than the maximum of 20 MHz specified in the datasheet.

What am I missing? At this point, I'm starting to think the ADC is broken. 

Thanks,

Chris

  • Hi,

    Thanks for sending us very clear information.

    For the following address setting (please see next):

    ======================

    4. Write address 0x00 = 0x0001 to enable register readback mode.

    =======================

    Could you please see the following modification and notice.

    0x00 (this is used for setting SDIN pin)

    0x0001 (Please needed to change it to be 0x0002) and (this is also used for SDIN pin).

    is it OK?

    then after that, you can try to run at your Step 5.:

    0x01 (this is used for setting SDIN pin)

    then read data out from SDOUT pin (timing is just after SDIN pin just finished its work).

    Hope this can work find for you.

    Thank you!

    Best regards,

    Chen

  • Sorry for the confusion. My step #4 had a typo in the description. It should have read ...

    4. Write address 0x00 = 0x0002 to enable register readback mode.

    If you look at the waveform attached, you'll see that I set the correct bit for enabling register read mode. 

  • I was able to test my ADS52J90EVM with a TSW1400EVM host board. I ran through all the setup steps in the user guide to test the ramp pattern output over LVDS and got stuck at the first capture. I got a "Frame clock error in Read DDR to file" error pop up window a short while after clicking the capture button.

    Can you suggest some next debugging steps to try to resolve this capture error?

    I powered both EVM boards with a power supply set to 5V and noted that the current was around 0.6A for the ADS52J90EVM and about 0.5A for the TSW1400EVM. These both seem like reasonable currents so I don't think there was a short anywhere in the test setup.

    I didn't see a specification for the clock amplitude (J75) anywhere in the user guide. Can you please specify a clock signal amplitude for the ADS52J90EVM.

  • Hi,

    Thanks for using ADS52J90EVM and TSW1400EVM as well.

    when your setup (hardware and software settings) correct,

    and after you run, you should ses

    from shown on ADS52J90 user's guide Page 11

    Figure 7. TSW1400 and ADS52J90 Setup

    You must be able to see only LED D6 =OFF

    (all other LEDs D2, D3, D4, D5, D7, D8 D9 are ON).

    please check.

    Thank you!

  • This did not solve my issue with the "Frame clock error in Read DDR to file" error. I confirmed that the LED settings match the user's guide on page 11. All LEDs are illuminated except for D6.

    ADS52J90EVM board is at 5V, 0.644A.

    TSW1400EVM board is at 5V, 1.238A.

    Can you please tell me what the specification is for the clock input to the ADS52J90EVM on J75? Is 1.4Vpp adequate?

    Thanks.

  • Thanks for new try.

    we will look into and try your test as well.

    Thank you for using ADS52J90EVM and TSW1400EVM.

    Thank you!

  • For your information, I was also able to confirm that the TSW1400EVM board is working correctly with a different ADC evaluation board (ADS5294EVM). I'm able to collect data without any errors in that configuration.

    Are there any tests that I can do specifically to confirm that the ADS52J90EVM is not damaged?

  • Hi,

    Here please confirm the following settings:

    1) SMA J75 needed to be connected to 65MHz from your signal source.

    2) First, you need to run High Speed Data Converter Prob (HSDC) GUI first (Not HMC-DAQ GUI).

    because it will be automatically run after you choose ADS52J90 on the Top Left button.

    3) at the first run, if your computer receive any error message from High Speed Data Converter Pro,

    please ignore it and then please run on (the other GUI) HMC-DAQ GUI and also follow all the selections you need to choose.

    for example, click on "DUT RESET" button, click on "Initialize Device", and Choose Data Format as you need.

    4) After you finish all the selection from HMC-DAC GU,

    then please go back to HSDC GUI, then you can see all the settings are done (automatically).

    5) in this case, you can hit "Capture" button to capture data and show the result on the screen.

    Thank you!

    Have a nice day!

  • Also,

    when you are running HSDC Pro GUI 

    but you got ""Frame clock error in Read DDR to file" error message.

    That means the other GUI which is HMC-DAQ GUI

    did not totally (completely) setup yet.

    So please make sure HMC-DAQ GUI must be setup

    before running "Capture" on HSDC Pro GUI.

    Hopefully these two GUIs  are working fine on your station.

    Thank you!

    Have a nice day!

  • 1) SMA J75 is connected to 65 MHz from my signal source. The amplitude of this clock signal is 0dBm. IS THIS THE CORRECT AMPLITUDE?

    2) When I run the High Speed Data Converter Pro (HSDC) GUI first, I see the following error after selecting the ADS52J90 on the top left button. This error message opens after the HMC-DAQ GUI automatically opens.

    If I click "Continue", the GUI never finishes initializing and I'm not able to click on the "DUT RESET" or "Initialize Device" buttons. The HMC-DAQ GUI only initializes fully without errors if I open it manually (separate from the HSDC GUI).

  • Hi,

    Thanks for letting us know.

    It looks like although both TSW1400EVM board and ADS52J90EVM board

    are connected to your PC's USB ports

    however, either one of the EVM boards are not detected by your PC.

    That is why the GUI keeps sending out of error messages.

    we will look into your issue.

    Thank you!

  • The solution to the HMC-DAQ initialization problem requires opening the HSDC Pro GUI "As Administrator" on Windows. Otherwise, the HMC-DAQ GUI initialization runs into permissions problems.

    I was able to collect samples from the ADS52J90 using the HSDC Pro software.

    Now, I'm planning on investigating how exactly the HSDC Pro / HMC-DAQ GUIs configure the ADS52J90 over the SPI bus to learn why I couldn't configure it using my own custom FTDI software. To be clear, I still don't have the answer to my original question.

  • Hi,

    Please download the 

    FT_Prog files to check if the EVM boards are correctly connected to your PC's USB or not.

    Please use the following link:

    https://www.ftdichip.com/Support/Utilities.htm

    Hope this can help you for checking.

    Thank you!

  • Hi,

    To make sure both ADS52J90EVM and TSW1400 EVM are really detected by your PC's USB ports.

    Please run "FT_Prog.exe" as you have loaded

    and run its "Scan and Parse" icon.

    You should be able to see the following example

    to make sure both EVMs are correctly connected and detected by your PC hardware:

    Thank you!

  • I checked the FT Prog output and confirmed that the I see the same FTDI chip properties on Windows and on linux using lsusb -v output.

    Here is the information recorded on my linux machine when connected to the ADS52J90EVM. I'm able to connect to this device and control the bitbang interface without any issues.

    Device: ID 0403:6011 Future Technology Devices International, Ltd FT4232H Quad HS USB-UART/FIFO IC
    Device Descriptor:
    bLength 18
    bDescriptorType 1
    bcdUSB 2.00
    bDeviceClass 0 (Defined at Interface level)
    bDeviceSubClass 0 
    bDeviceProtocol 0 
    bMaxPacketSize0 64
    idVendor 0x0403 Future Technology Devices International, Ltd
    idProduct 0x6011 FT4232H Quad HS USB-UART/FIFO IC
    bcdDevice 8.00
    iManufacturer 1 FTDI
    iProduct 2 ADS52J90vAEVM
    iSerial 3 K1471201
    bNumConfigurations 1
    Configuration Descriptor:
    bLength 9
    bDescriptorType 2
    wTotalLength 101
    bNumInterfaces 4
    bConfigurationValue 1
    iConfiguration 0 
    bmAttributes 0x80
    (Bus Powered)
    MaxPower 100mA
    Interface Descriptor:
    bLength 9
    bDescriptorType 4
    bInterfaceNumber 0
    bAlternateSetting 0
    bNumEndpoints 2
    bInterfaceClass 255 Vendor Specific Class
    bInterfaceSubClass 255 Vendor Specific Subclass
    bInterfaceProtocol 255 Vendor Specific Protocol
    iInterface 2 ADS52J90vAEVM
    Endpoint Descriptor:
    bLength 7
    bDescriptorType 5
    bEndpointAddress 0x81 EP 1 IN
    bmAttributes 2
    Transfer Type Bulk
    Synch Type None
    Usage Type Data
    wMaxPacketSize 0x0200 1x 512 bytes
    bInterval 0
    Endpoint Descriptor:
    bLength 7
    bDescriptorType 5
    bEndpointAddress 0x02 EP 2 OUT
    bmAttributes 2
    Transfer Type Bulk
    Synch Type None
    Usage Type Data
    wMaxPacketSize 0x0200 1x 512 bytes
    bInterval 0
    Interface Descriptor:
    bLength 9
    bDescriptorType 4
    bInterfaceNumber 1
    bAlternateSetting 0
    bNumEndpoints 2
    bInterfaceClass 255 Vendor Specific Class
    bInterfaceSubClass 255 Vendor Specific Subclass
    bInterfaceProtocol 255 Vendor Specific Protocol
    iInterface 2 ADS52J90vAEVM
    Endpoint Descriptor:
    bLength 7
    bDescriptorType 5
    bEndpointAddress 0x83 EP 3 IN
    bmAttributes 2
    Transfer Type Bulk
    Synch Type None
    Usage Type Data
    wMaxPacketSize 0x0200 1x 512 bytes
    bInterval 0
    Endpoint Descriptor:
    bLength 7
    bDescriptorType 5
    bEndpointAddress 0x04 EP 4 OUT
    bmAttributes 2
    Transfer Type Bulk
    Synch Type None
    Usage Type Data
    wMaxPacketSize 0x0200 1x 512 bytes
    bInterval 0
    Interface Descriptor:
    bLength 9
    bDescriptorType 4
    bInterfaceNumber 2
    bAlternateSetting 0
    bNumEndpoints 2
    bInterfaceClass 255 Vendor Specific Class
    bInterfaceSubClass 255 Vendor Specific Subclass
    bInterfaceProtocol 255 Vendor Specific Protocol
    iInterface 2 ADS52J90vAEVM
    Endpoint Descriptor:
    bLength 7
    bDescriptorType 5
    bEndpointAddress 0x85 EP 5 IN
    bmAttributes 2
    Transfer Type Bulk
    Synch Type None
    Usage Type Data
    wMaxPacketSize 0x0200 1x 512 bytes
    bInterval 0
    Endpoint Descriptor:
    bLength 7
    bDescriptorType 5
    bEndpointAddress 0x06 EP 6 OUT
    bmAttributes 2
    Transfer Type Bulk
    Synch Type None
    Usage Type Data
    wMaxPacketSize 0x0200 1x 512 bytes
    bInterval 0
    Interface Descriptor:
    bLength 9
    bDescriptorType 4
    bInterfaceNumber 3
    bAlternateSetting 0
    bNumEndpoints 2
    bInterfaceClass 255 Vendor Specific Class
    bInterfaceSubClass 255 Vendor Specific Subclass
    bInterfaceProtocol 255 Vendor Specific Protocol
    iInterface 2 ADS52J90vAEVM
    Endpoint Descriptor:
    bLength 7
    bDescriptorType 5
    bEndpointAddress 0x87 EP 7 IN
    bmAttributes 2
    Transfer Type Bulk
    Synch Type None
    Usage Type Data
    wMaxPacketSize 0x0200 1x 512 bytes
    bInterval 0
    Endpoint Descriptor:
    bLength 7
    bDescriptorType 5
    bEndpointAddress 0x08 EP 8 OUT
    bmAttributes 2
    Transfer Type Bulk
    Synch Type None
    Usage Type Data
    wMaxPacketSize 0x0200 1x 512 bytes
    bInterval 0
    Device Qualifier (for other device speed):
    bLength 10
    bDescriptorType 6
    bcdUSB 2.00
    bDeviceClass 0 (Defined at Interface level)
    bDeviceSubClass 0 
    bDeviceProtocol 0 
    bMaxPacketSize0 64
    bNumConfigurations 1
    Device Status: 0x0000
    (Bus Powered)

    I spent more time reverse engineering the TI software configuration waveforms of the ADC and LMK chips. As far as I can tell, my SPI bus transactions match the TI software to configure the board with the LVDS 14-bit example in the user guide. I'm still unable to readback any register values with my FTDI c code. Below is a zoomed out capture of the configuration of the ADS52J90EVM using the TI software.

    Here is my waveform generated when connected to linux and running my FTDI C code. At the very end of the capture, I added three read transactions for addresses 0x01, 0x02, and 0x03. All 3 addresses readback 0, but I'm expected to see address 0x01 = 0x0014, 0x02 = 0x0000, and 0x03 = 0x2000. 

  • Hi,

    How are you?

    Sorry, could you please let us know first about

    when you were testing ADS52J90EVM with TSW1400EVM (including GUIs software) together,

    did both of them (ADS52J90 and TSW1400 boards) work correctly for you?

    Or both of them are still not working correctly after you had checked both USB connections by using FT Prog to check?

    Could you please let us know?

    Then after that we can focus on next step for you.

    Thank you very much!

  • When testing the ADS52J90EVM, TSW1400EVM, and GUIs together, I'm able to properly configure and capture samples using the LVDS_16ch_14x_14b_SINE_DIV1 configuration.

  • Hi,

    also our engineer suggests the followings.

    Please double check them on your side.

    Thank you!

    ================================================================

    1. The following register writes are done in the GUI before write and read actions from the ADC block of ADS52J90EVM

    Block

    Action

    Register

    Value

    ADS52J90_ADC

    Write

    0x00

    0x0000

    ADS52J90_ADC

    Read

    0x00

    0x0002

    2. Please make sure and fix that (shown below)  " writing a wrong value to register 0x00 to enable readback"

    ---------------------

    --------------------

    3. Could we please ask for the C code he built to configure the ftdi port and perform spi transactions. We could verify the sequence followed to make the SPI transactions and get back to him.

    ================================================================

      Thank you!

    1. 1. I matched the TI GUI software pattern of writing address 0x00 = 0x0002 before every read transaction.

      2. If you look back in the forum thread, I responded to this issue. The description has a typo, and the waveform shows the correct write of address 0x00 to value 0x0002. Here is an example of the read sequence for address 0x01.

      Write address 0x00 = 0x0002

      Then, read address 0x01.

      3. Here is my current C code to configure the ADS52J90EVM to match the TI GUI software. I've added 3 address read transactions at the very end of the sequence that still always read back 0. 

      ads52j90evm_config.tar.gz

    2. Hi,

      We have forward your information to our engineer for checking.

      Thank you!

    3. Chen Kung was able to send me some example C code using the FTDI D2XX library to write and read back one of the registers. This worked flawlessly and I was able to compare the differences of this example code to my code. 

      The critical difference was that I was not setting the RSV_DIG (connected to ADS52J90 pin labeled SPI_DIG_EN) pin high. When SPI_DIG_EN is set low, the SPI SDOUT pin seems like it is stuck low. This doesn't seem to be documented in the ADS52J90 Datasheet nor the ADS52J90EVM User Guide. This is the only note that I see in the ADS52J90 datasheet (Pin Functions Table on pg 8) is shown below.

      “SPI_DIG_EN,    B6,    I,     Reserved for digital functionality. This pin can be left floating or be connected to the 1.8-V supply. This pin has an internal pullup resistor of 20 kΩ.”

      Given this note, I probably should have assumed this pin needs to be pulled high with the FTDI chip on the ADS52J90EVM, but this is not clear at all. I hope this saves someone else some trouble when using the ADS52J90 or ADS52J90EVM.