This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS8344: timing related noise

Part Number: ADS8344

I am reading 4 channels at a time from the ADS8344EBG4 in 24-bit mode, with no power-down between cycles, using an external clock ( 1.5 MHz )

In this mode I send ( 13 * 8 ) clocks to the device, with nCS framing all of the clocks ( not going inactive until the whole cycle is complete )

Reading channels 0-2-4-6, I see occasional 'glitches'. These are:

  • only on channel 4 ( the third channel read )
  • Temperature dependent ( I only see them if the temperature is within a certain small range - approx 28C-32C )
  • A constant offset from the 'true' value
  • Not on all boards ( I see it on 2 out of a sample of 6 )
  • Occur once every 10-20 samples ( under the above conditions )

Looking at the numbers from the ADC, it appears that the glitches happen when the output value transitions bit 3 - i..e from 0xn7 to 0xn8 - and that the offset is a value of 16. Background noise in the system ( in the order of +/-2 bits ) makes this difficult to be absolutely certain, but all observed glitches have been around this transition, and I can see from the data that the 'glitch' number represents a constant offset from the real number.

If I swap the order of reading, 4-2-0-6 then I see the glitches on channel 0 - i.e. they have remained with the third channel read.

I don't see any other activity on my board related to this, and it is difficult to see noise induced effects having such a 'digital' result.

I can 'fix' the problem by reading 0-2-4-4-6  ( and then throwing away the first sample of channel 4 ), but this is hardly ideal.

Anyone with experience of this device that has spotted any similar effects?

  • Hello, 

    I suspect it is a digital timing issue seeing how it does not follow the analog input

    Would you provide a scope shot of the digital communications for a good frame and the third bad frame?

    Doe the error repeat on every multiple of 3, meaning is the glitch seen on frame 3, 6, 9 and so on?

    Also, would you provide more detail about this glitch?



  • Hi Steven,

    Apologized for the late response. I have some questions:

    1. Do you mean reading the data with 24 clock cycles? your "24-bit" made me confused.
    2. Have you tried to use internal clock instead of external clock? 
    3. Can you provide the timing captured with an oscilloscope including DCLK, DIN, BUSY and DOUT with the glitches? the raw data captured from the ADC will be very helpful. Also, a schematic will be helpful as well.
    4. Can you please only exchange the ADC devices between the circuit board showing the glitches and the board without showing the glitches? then re-check the result.