This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADC12J4000: SPI while acquisition

Part Number: ADC12J4000

Hi,

I am using a custom board with an ADC12J4000 and an Arria10 FPGA.

I use the ADC to capture a PRBS modulated signal (@409MSPS), then I do a BER on the samples to check for errors.

I noticed that when the acquisition/jesd is running, if I do an SPI read to check ADC12J4000 status, sometimes an error appears in the stream.

Is it a known issue with this ADC ? I shouldn't use SPI while jesd is running ?

Or is it an issue with my board / spi ?

Thanks

  • Avantx,

    I wouldn’t expect just reading the SPI to cause errors in the bit stream unless there are layout issues on your board causing significant noise coupling, ground bounce, etc. There might be minor impacts on ADC capture performance due to noise coupling at board or IC level.

     

    There isn’t really any reason to poll the ADC status registers unless the RX FPGA detects a link problem, so I would recommend only to do status reads when a RX link error is detected.

    Regards,

    Jim

  • Jim,

    thanks for your quick answer.

    "layout issues on your board causing significant noise coupling, ground bounce"
    I will check this.

    "There isn’t really any reason to poll the ADC status registers"
    I do poll every 5 seconds in my software, some status from the ADC.
    Especially the "link_up", "pll_locked", "sysrefdirty", to be sure that my link jesd is fine. (That's how the ADC12J4000EVM GUI is working ? the user can check some status).
    I thought this was the way to go, but ok, I will look at the FPGA IP API to get those info.

  • I have discovered a crosstalk issue on the board with the pll that generated the sampling frequency and the spi link.
    I have also tried on a 2nd board, the adc12j4000 is working fine.

    So the issue comes the first board (which has a different layout), the adc12j4000 can be polled with no problem.

    Thanks for the help.