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ADS1292R: Offset output data rate possibility

Part Number: ADS1292R
Other Parts Discussed in Thread: ADS1292,

Hi Team,

According to the datasheet, the ADS1292 can only output data at specific given data rate, i.e. factor of 2 starting from 125 up to 8000 SPS. We would like to know if it would be possible to slightly offset the output data rate by feeding a slightly offset external clock source.

This external clock source would obviously have to be within the external clock input frequency range stated in section 6.5 of the datasheet, i.e. -5%/10%, but I’m unable to locate documentation on the effect of this tolerance on the modulator frequency (and ultimately the output data rate).

With the previous information in mind and assuming the external clock offset is indeed reflected on the output data rate, let’s consider a desired output data rate of 2048 SPS. Using a oversampling ratio of 64 (i.e. 2kSPS on internal clock), we would need the modulator clock to run at 131.072kHz. This frequency could then be obtained by using an external clock source of 524.288kHz and the divide-by-4  frequency divider. Granted we have not found any documentation on our main assumption, is the above example possible using the ADS1292R?

Regards,

Ramon

  • Hello Ramon,

    Thanks for your post. Yes, that is perfectly acceptable. The data rate will scale by the same factor as the external master clock frequency. Performance of the ADS1292R will not be affected as long as the clock frequency is within the acceptable frequency range.

    Regards,