This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS1675: looking for FPGA Source Code to ADS1675

Part Number: ADS1675


Hello,

is there any source code related to the ADS1675? I could find different threads but non with the source code. May someone can email me?

One technical question in addition: is the vhdl implementation alywas with two clock domains, that SCLK is the first clock domain to clock the input signals from the adc or is it also possible to implement only with the internal clock and if so, how fast it needs to be?

Thanks,

Kind regards

Julian Bauer

  • Hello Julian,

    The only available reference material we know about for this device is shown in this thread which references the EVM source: https://e2e.ti.com/support/data-converters/f/73/t/765288?CCS-ADS1675-FPGA-CODE

    It will not be an example code project and is likely very EVM and EVM platform specific, but could help as a starting point.

    Can you confirm which communication type you're planning to use between the options shown in Figures 2, 3, and 4 in the datasheet?

    https://www.ti.com/lit/ds/symlink/ads1675.pdf

  • Hello Julian,

    Thank you for your post. I will share the source code and password to the email address in your E2E profile.

    The ADS1675 requires two different clocks to operate. The external CLK input is required to control the sampling of the delta-sigma modulator. The SCLK is the interface clock required to read data from the device.

    Regards,

  • Hello,

    thanks for sharing the source code with me. I am planing to use the LVDS mode. SCLK_SEL=0 so i use internal generated SCLK, wide bandwith mode.

    At the moment I don't get data output, so I'm still locking for the mistake. I put /CS to low in the hardware design. I get the SCLK from the ADC but when I send the START pin high, I only get data ready pulses, but no data on the DOUT.

    If somebody has an idea what could be wrong please let me know. Thanks a lot,

    Regards,

    Julian