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DAC5662: DAC5662 returns from sleep mode

Part Number: DAC5662

Hello,
Now I am designing circuit that using DAC5662.
I have two questions related DAC5662 returns from sleep mode.

Q1:
I would like to confirm if there are conditions other than SLEEP pin H level to L level shift to return normal operation state.(Example: clk signal input is required to restore operation of internal reference circuit etc.)

Q2: 
I would like to confirm that the time between SLEEP pin H level to L level shift timing to return normal operation state.

Regards,
MESH

  • MESH:

    When you power down (or sleep) you do not need to disable the clock.  If the clock is present, then switching sleep pin low is sufficient to restore operation. If the clock is also powered down, then that must also be restored.

    If clock is present, the recovery from sleep will be on the order of a few ns.

    --Russell

  • Hi Russell,

    Thank you for your reply.

    I think that the clock signal will be power down due to restriction of host circuit current consumption while DAC5662 does not use.

    Therefore let me confirm in addition that how much time will it take until DAC5662 recovered from the timing the clock signal re-input (first shift of low level to high level) on SLEEP signal low state.

    Regards,

    MESH

  • Hi MESH,

    The wakeup time for DAC5662 is about 7-10usec and sleep time was about 2-3usec. Since this measurement was done on only 1 board. To account for chip to chip variations and PVT I would recommend you triple the numbers for WAKE UP time and sleep time of DAC.

    Regards,

    David Chaparro

  • Hi David,

    Thank you for your reply.

    Your reply is very helpful for me.

    Regards,

    MESH