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DAC8775: Status Register data incorrect

Part Number: DAC8775

Hi, I am using DAC 8775 in 0-15V and 4-20mA settings. Although the Ic works great, We have encountered 2 problems:
1) When any (or all ) channel is set in current mode while not under load the IC registers error.

2) Reading the error code (status register) returns the gibberish answer: 34,823‬ (1000100000000111). I receive the same value when we activate different channels in current mode or load all but one channel. I have tested multiple chips, all giving the same problem.

Please advice.

  • Hi Anil,

    There could be a few causes of this, but let's review the basics:

    1. Can you share your schematic?

    2. Can verify that your SPI command is valid and matches the timing requirements? Please feel free to share a scope shot of the two read commands.

    Thanks,

    Paul

  • Thanks for the response Paul,

    I do not think we have any problem with SPI timing as all other commands (such as opening buck boosters or selecting a output value) seems to work fine. To read status registers we tried both 0x8b0000 and 0x0b0000 commands.


    Here are the schematics for the device;

  • Well, it is possible the readback 0x8807 does have a meaning.  The MSB is a reserved bit, but you could have a watch-dog timer alarm.  Did you enable the alarm? 

    It is also possible that this data is bit-shifted on the readback due to an error in the SPI master.  An oscilloscope capture would confirm that.  If it was left-shifted, it might actually just be 0x010F, which would mean that all the channels are in the fault conditions.  Do all of the configuration registers read back correctly (the same value that was written)?

    The fault bits (FA, FB, FC, FD) could be asserted if you have an open load, as that is a fault condition.  

    Thanks,

    Paul

  • Hello Paul,

    As I have previously stated, we only seems to have a problem when reading status register. I can set the channels in current/voltage mode, set specific values, control buck boosters, set ad read the offset, set and read device ID. If you have a specific register in mind for us to test, I can double check it.

    I have not opened the WDT alarm and from the data sheet I read it as set to false by default.

    Here is the main problem: Just like you, I too suspected that the we might have faulty timings so I have done some tests. I have deliberately set select channels to open circuit condition to create predictable errors. Sadly no matter which combination I pick I always get the same answer.

    Sniffing the communication of this channel was especially difficult as we do not have any test points for it Regardless, I somehow seem to manage it. Here are the results:
    Note that Cyan is clock, Yellow is MOSI and Magenta is MISO.

    Thanks,

    Anıl

  • Hi Aniz,

    I think you are getting inconsistent results because you are violating the maximum timing requirement for the device.  This device supports a maximum SCLK frequency of 25MHz, and it seems that you are doing something closer to 60MHz.  It is possible that the data is being latched incorrectly, and it is possible that the SDO line cannot drive the output at this speed, so the readback is not valid.

    Try significantly reducing the SPI timing as a debug step.  I think you could start with the max allowable speed, but it might be a good check to use something very slow, like 10MHz to verify the response.

  • Hello Paul,

    I have reduced the clock speed to 750 kbits/s to stay on the safe side. I have also removed the pull up resistor in the MISO side to get a clear signal. However the response remains the same ; 8bc7

    Here are the scope photos. Again Yellow is MOSI, Cyan is Clock,  Magenta is MISO

    Thanks,

    Anıl

  • Just for my clarification, when you do a read, you are issuing two commands, correct? For example, you send 0x8B0000 and then a NOP command, 0x000000.  The readback is valid on the second command.  

    I just want to verify this, as otherwise the device will likely just be echoing the previous command.

  • Hello Paul,


    Indeed this seems to be the problem. The age old add age is truly correct; smaller the bug, harder to kill it.

    For all others who might read this thread, the problem seems two fold,

    1) Use the correct edge detection for SPI (2nd edge)

    2) All read commands require a nope command.

    What is truly surprising is that this IC can responds correctly for nearly every other command even with wrong settings.

    Thanks for all the assistance.

  • That's great to hear!

    Thanks,

    Paul