Part Number: ADS131M08
Hi team,
Using the default ADC initialization configuration, it is found that the DRDY pin is high level, and the return value of 0x00, 0x01, 0x02, and 0x03 registers is not the default value. What are the possible reasons for the high level of DRDY pin?
Amy,
I would start by checking the clock source for the ADS131M08. Is the customer using the oscillator/crystal or using an external clock on CLKIN? Regardless, I would have them verify that the device is getting a clock signal.
I would also check the CLOCK register (03h). First, check the setting at bit 7 for the crystal oscillator setting. Then the I would alo check bits 15 to 8 to make sure all of the ADCs are enabled.
It also has me concerned that they were not able to read the ID register. This register should be hard wired to the give the correct value. I would have the customer read this register directly. This would be a read of one register, at address 0h. The method for reading this value is found in Figure 41 on page 37 of the datasheet. You can find the picture below:
Have them try this command, and use an oscilloscope to capture the SPI communications. When they are able to do this, post a scope shot back on the reply to this thread.
Joseph Wu
