ADS1230: Sample Schematic tips for lower noise

Hi Milad,

One addition that I would suggest is to add RC input filters on the analog inputs.  See my additional comments below.

Best regards,

Bob B

milad xa said:

Part Number: ADS1230

Dear Experts, 

according to Bob's tips about the pcb layout and schematics for ADS1230, I have prepared a very simple schematic for a loadcell board, please find the picture below and notify me for changes if necessary, then I will prepare PCB layout and update the topic shortly.

also I have some questions:

1. is it necessary to connect AGND and DGND together? cause i had used a DC-DC isolator for analog supply and i don't want to get rid of it. [Bob] AGND and DGND should be connected together.  The absolute maximum specification is that AGND and DGND be within 300mV of each other.  This is difficult to achieve when using two different supplies.  In fact it doesn't take much inductance to separate the grounds by 300mV when connecting in a star ground configuration.  You can successfully use the same supply for both the digital and analog.  The key consideration here is to keep the analog signals away from the digital signals.  So as long as you have a good ground plane and the signals are partitioned properly you should not see an issue. 

2. Shall I use decoupling capacitors for Loadcell exc+ in pin REFP? [Bob] Yes, I would recommend a 100nF cap across the REFP/REFN input.

3. can I achieve 1g precision for 30 kg loadcell (2 mv/V) by gain of 64 without any noise? [Bob] Why not increase your dynamic range by setting the gain to 128?  You will achieve the best noise performance using the highest possible gain.  Your maximum load cell output with 2mV/V sensitivity and excitation of 5V is 10mV.  From the noise tables in the ADS1230 datasheet, the peak-to-peak noise at 5V, and 10sps is 290nV for gain of 64 but is reduced to 198nV for gain of 128.  If you use a gain of 128, the number of noise-free bits is 17.5.  Following the datasheet calculations on page 20 of the datasheet you should be able to achieve 2^17.5*(10mV/39mV) which would equal about 47,500 noise-free scale counts.  What this calculation is showing is the total number of noise-free counts is reduced as you are only using about 1/4 of the full-scale range.  If your target is 30,000 counts, then you should be able to achieve this resolution.  That is of course assuming that external noise, such as EMI/RFI, is not causing an issue.  This is one of the reasons why I suggest adding RC filters at the analog inputs.

If you use the gain of 64, then the calculation is 2^18*(10mV/78mV) is 33,600 noise-free counts which would also work.

regards 

Hi Milad,

I would highly recommend not using any inductance in the supplies.  What the inductance will do is sharply choke any required current by the ADS1230 that is drawn very quickly for short periods.  This includes startup current when charging caps external to the ADS1230.

It has been demonstrated that using a single solid ground plane, common supplies and a well partitioned PCB (analog and digital signals in separate domains that do not cross) can achieve the performance shown in the noise tables of the ADS1230 datasheet.  So the question from my perspective is why the additional filtering is required?  Is the supply source very noisy?  As the 5V source is not shown in the schematic, It is not clear as to how the source is regulated.  But in general it is better to place the effort in creating a well regulated supply, such as using an LDO linear regulator.

I would prefer not seeing even ferrites on the supply lines.  Ferrites are designed to filter certain frequency ranges and may not filter the frequencies intended.  If filtering is truly required, then I would suggest creating a low-pass filter with an RC input filter on the supplies.  The R value would be in the range of 1 to 10 Ohms, and the cap value will depend on the desired cutoff frequency and the startup settling time required.  Again, this should not be necessary for a well designed power circuit.

As far as the filter circuit, the common-mode caps C9 and C10 should be on the other side of R1 and R2.  Also there should be an additional differential filter between R1 and R2 on the AINP/AINN side of the resistor by adding another cap.  The added cap should have a value at least 10 times greater than the value of C9 and C10.  Let's say the new cap is 100nF, then C9 and C10 should be no larger than 10nF.  The reason for this is to prevent a difference voltage created by the common-mode filters due to device mismatch and tolerance.

In the end you will be faced with external noise which is often overlooked.  This can come from a variety of noise sources such as EMI/RFI which is picked up on load cell cabling and then gained up.  The input filters will help reduce some of the noise, but the external noise is usually much larger in amplitude than the signal.  Designing a very low cut-off frequency can help eliminate the noise, but will also have a very long analog settling time as load changes on the load cell.  The RC filter design will depend on your system requirements.  If you use the cap values mentioned previously, you can start with 1k resistor values as a starting point.

The second place where noise can be an issue is with the PCB layout.  Depending on grounding and trace/component placement you can either have a well working system or a very poorly working one.

Best regards,

Bob B

Hi Milad,

I'm not sure what you really gain in the end by having the ground split. There are some sensitive nodes.  One such node is C3, and this cap is not fully covered by ground underneath due to the split.

You show a noisy supply and the routing of this supply to the load cell runs through the analog input on the bottom-side of the board.

C8 and C11 silkscreen do not match the positions in the schematic.  I will assume that this is just a silkscreen placement issue.  I would suggest moving C11 (diff cap in schematic) as close to the analog inputs as possible, and then adjusting the remaining components to make the path a little shorter from the connector pins.

Best regards,

Bob B