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DAC8163T: Vout will go to ground after CLR pin goes low as reset

Part Number: DAC8163T

Hi team,

Customer is using our DAC8163T and when power on, vout will at mid-scale 2.5V.

They're using internal vref and after reset(CLR pin goes low and then high), Vout will go to 0V and stuck at 0V.

Do you know what might be the reason why Vout could not stay at 2.5V after reset?

I found a description in datasheet :  No device pin should be brought high before applying power to the device.

We could not guarantee there's no clock signal before device power on.

Is it still okay in this case?

They had used DAC8163T for years and this is the first time they see this issue.

Thank you.

Best Regards,

Cindy

  • Hi,

    As mentioned in the datasheet , No pin should be brought high before power is applied to device, including SCLK.

    Can you just describe sequence of events after powering up the DAC to get a better understanding. Is it like the following?

    1. Power up the DAC ( I assume CLR pin is low in this period and brought high)

    2. Measure voltage it will be at 2.5V

    3. Then CLR pin brought low and taken high right?

    Regards,

    AK

  • Hi AK,

    Yes, you're right. The sequence is just as what you list down.

    After these steps, Vout will be 0V.

    Is there any reason that will cause this problem?

    Thank you.

    Best Regards,

    Cindy

  • Hi,

    Can I get a scope shot of your device supply, Output and CLR pin when you assert CLR pin Low and High transition?

    Also please check the reference voltage output after asserting CLR pin low to high transition.

    Please follow power up sequence as per the datasheet. No device pin should be brought high before applying power to the device.

    Regards,

    AK

  • Hi AK,

    Customer could do SW reset but could not do HW reset through CLR pin.

    Could you please let us know if our EVM can do HW reset?

    If yes, the problem might be power up sequence.

    Thank you.

    Best Regards,

    Cindy

  • Hi,

    Using CLR pin, you cannot do a full reset of the device. All the DAC registers except the DAC DATA input registers will be in the previous state.

    DATA registers will be cleared to according to the device. In your case of DAC8163T, output will be cleared to mid scale voltage.

    This device doesn't have HW reset using a pin, all it has is SW reset, CLR functionality . SW reset will do entire device reset or only partial reset based on the DB0 bit.

    Hope this clarifies.

    Regards,

    AK

  • Hi AK,

    Thanks for your explanation.

    Basically, after trigger CLR pin, output will be cleared to mid scale voltage by using our DAC8163T EVM , right?

    Customer hopes to see the behavior of output goes to mid scale but they could not achieve it through CLR pin.

    Thus, they're just curious about if our EVM could do so.

    Thank you.

    Best Regards,

    Cindy

  • Hi,

    Can you please check how are they doing CLR in EVM?

    They just need to put a jumper in JP1 and remove as shown in the schematics below to activate CLR functionality. This will result in falling edge of CLR signal.

    Regards,

    AK