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ADC12DJ3200: DEVCLK_LVPECL_EN

Part Number: ADC12DJ3200


I noticed that it's recommended to use AC coupled and set DEVCLK_LVPECL_EN to 0 for CLK+/- input. 

Like to confirm should DEVCLK_LVPECL_EN still be set to 0 if the clock is AC-coupled LVPECL signal output from the PLL? Thanks.