Hi,
as mentioned in the datasheet of ADS7853 figure 90., to read back the configuration register (CFR) you have to use 48 SPI clocks. As it is easier for our system to integrate we would just want to use 32 SPI clock sequences, but still use the CFR readback feature to confirm the ADC is working as intended.
So we just tried to read back the CFR with 32 SPI clocks and it works fine. Can you confirm that this is intended and not going to be changed/bugfixed in future revisions ? Cause that would be really bad if we would rely on a feature thats not officially supported and changed afterwards.
Thanks for your answer.
Greetings,
Steve