ADS1258: RESET & PWDN pin tie together

Hi Seong,

I will need to look into this a bit further, but I imagine it is possible that both signals are received simultaneously and the PWDN signal is prioritized over the RESET signal. In this case, the RESET signal might not get acknowledged by the ADC. So when you bring the device out of the PWDN mode, the registers will have retained the values they had before the PWDN signal and not be reset to their default values. I will confer with our design team for more information however and get back to you when I hear from them.

Is there any reason to have both pins tied together, or would it be possible to control these pins with separate GPIOs from your MCU?

-Bryan

hi Brian,

Thanks for the reply. at this moment. We can only tie PWDN to RESET pin because our PCB is fixed.

We only momentarily get PWDN and RESET pin to "GND' during power up. so I was thinking this should work because during power up, FW has not yet set the registers. therefore  registers in ADC1258 will not change.

The reason to momentarily put PWDN pin to "GND" during power up is quite interesting as below.

The CLKIO does not comes out during power on. So I momentarily put PWDN pin to "GND" after 1.5s power is applied, then the CLKIO comes out.

Hi Seong,

The CLKIO should come out after power-up. There is a wake-up time for CLKIO that is specified on pg. 24 in the ADS1258, and shown in Figure 50 / 51, that depends on the master clock frequency, fCLK. Note that this time also depends on whether you are using the internal oscillator or an external clock, as shown in Table 9 on pg. 24

-Bryan

h Bryan,

yes. I have read the data sheet many times on the CLKIO , PLL and etc. we are using internal crystal oscillator. so we are expecting CLKIO to come out. another strange phenomena is when power off 5 seconds then power on again.( our instrument power off is 5 seconds), the CLKIO will come out.

But if we power down for > 30 seconds, then CLKIO will never come out.

I could not find out why as the other 7 ADCs with the same layout/schematics are able to work just fine.

I am out of idea, so I just use PWDN to make the ADC working.   

so if you can help to figure out what's wrong , that will be great.

Hi Seong,

So that I understand, you have 8x ADS1258's in your system and only 1x ADS1258 is exhibiting this behavior?

If that is the case, my first thought would be that you are having crystal startup issues. These are common with the ADS1258, since those 32 kHz watch crystals tend to be hard to tune. Perhaps the tolerances on that crystal is slightly different, or the load capacitor values are a little off. This might explain the powerdown issue: when you turn the system off briefly, the caps discharge some voltage, enough to get the crystal to start oscillating when you power the system back up. But if you leave the system off for too long, the caps discharge completely so the circuit has to start from 0.

It might be worth trying to tune this specific circuit, or getting a new crystal (or swapping out one of the ones you know works from one of the other 7x ADS1258s). Or, if you are satisfied with the solution you have, you can always leave it as-is.

Given the information in this thread, this would be my best guess as to what is occurring. Please let me know if you discover anything else, or if you want to discuss this issue further.

-Bryan

Hi Seong,

I was able to speak to one of our design engineers about the ADS1258, and he mentioned that by tying RESET and PWDN together there is a chance that the RESET pin might not be acknowledged due to the tolerances inherent in the device. I will not get into the details of why this occurs, but will note that it is possible so we would not recommend this configuration if the intent is to ensure that both PWDN and RESET actions complete.

However, it sounds like your issue is a bit different as I described in my last post, so hopefully we can work to resolve this so you will not have to concern yourself with this extra PWDN step.

-Bryan