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ADS8568: Differences between ADS8556 and ADS8568 ?

S. Gaudreau
Intellectual 435 points
Part Number: ADS8568
Other Parts Discussed in Thread: ADS8556,

We have an ADS8556 in an old design, connected in Hardware Mode and not updating configuration register. Parallel data transfer.

We have made another design using ADS8568, connected in Hardware Mode and not updating configuration register. Parallel data transfer.

Between the 2 designs, the wiring are identical, considering the Net Names  (Pinout is different).  Almost a cut and paste...


Except the speed and the number of inpufs channels, is there anything else to consider for the digital part ?

Actually, the ADS8568 in the new design doesn't seem to be alive.


Also, what is the behavior if we do 6 parallel read rather than 8 reads ?

Thanks !

  • 0
    TI__Mastermind 37220 points

    Hi Stephane,

    There is no big difference for Parallel interface and hardware mode on these two ADCs. There are some differences, for example, difference conversion time because fo different maximum sampling rate. Both have similar digital timing for parallel interface. The key difference may be on analog side because higher sampling rate requires faster signal settling and higher BW amplifier to drive on the input.

    6 readings could mess up the timing to have incorrect data on different channels, so I suggest you still send 8 reading pulses to retrieve the data from the ADC and just ignore the data on the channels you do not care about.

    A new generation ADC, ADS8588S family integrates analog front-end(AFE) including PGA, high input impedance(1Mohm) and LPF filter on each channel, usually driving  amplifier is not required on each channel, this ADC family also provides better performance. Also, a 6-ch version 16-Bit ADC, ADS8586S is available in this ADC family.

    Best regards,

    Dale

  • 0 in reply to Dale Li
    Intellectual 435 points

    Hi, 

    We actually added 2 more reads (to have 8 total) as a first test and everything was back to normal in the readings.

    Even if we didn't find the information in the datasheet about the behavior if the number of reads wasn't 8, your answer comfirms to me that it is a correct solution.

    Thank you very much !

    Stephane

  • 0 in reply to S. Gaudreau
    TI__Mastermind 37220 points

    Hi Stephane,

    Thanks for update.

    Best regards,

    Dale

  • 0 in reply to Dale Li
    TI__Mastermind 37220 points

    Hi Stephane,

    Actually, you can use only 6 read pulses by setting CONVST_x pin for unused channel pair  to static 1 in hardware mode if CONVST_x pins are controlled by individual signals from the controller. Also, a toggle of hardware reset pin is preferred as part of initialization sequence on power up.

    Best regards,

    Dale