I have an application where I use 16 of the ADC3660 connected to an FPGA in 32 decimation/20bit complex mode.
All of the ADCs have their NCOs at the same frequency and are configured identically. I would like to synchronize them so that the phases and samples are aligned.
1. What is the recommended synchronization procedure? Should the sync pin be driven high for a short period after all of the ADC registers are programmed or driven at regular intervals?