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ADC12DL3200EVM: About LMK04828

Alec Huang
Prodigy 105 points
Part Number: ADC12DL3200EVM
Other Parts Discussed in Thread: LMK04828, TSW14DL3200EVM,

Hi,

I have some questions about the reference design you provided previously.

The image below is LMK04828 from the schematic file. When operating in external clock mode, I found that none of the outputs from LMK04828 was actually used. CLKP/M were not used. The SYSREF calibration described in the 7.3.4.3.1 ~ 7.3.4.3.2 wasn't executed, thus no signal coming out from SYSREFP/M. DCLKOUT10_P/N and CLK_ADC_REF_P/N were not used in the reference design either. Is LMK04828 not necessary in this circumstance?

Best Regards,

Alec

  • 0
    TI__Guru* 91947 points

    Alec,

    The reference design only calls out using one setup with on-board clocking. If you are attempting to use external clocking, the LMK will have to be synchronized to the external source as the LMK is required to generate the FPGA reference clock used on the TSW14DL3200EVM (CLK_ADC_REF_P/N).

    You will have to connect a common 10MHz reference to the external clock source and J2 of the ADC12DL3200EVM. The LMK will then have to be setup in dual PLL mode and the output on DCLKout12 set to the appropriate frequency. You may have to consult the ADC12DL3200EVM User's Guide for more information regarding this setup. 

    Regards,

    Jim