ADS131A02: The DRDY pin outputs pulse of 640Hz after power up without doing anything to the chip.

Hi user6519081,

welcome to our forum and thanks a lot for your interest in our ADCs.

Unfortunately your images didn't come through. Could you try to attach them again?

As you correctly stated, the ADS131A02 should not start any conversions on its own after power-up. But I believe nDRDY should transition from low to high as soon as the power-on reset procedure is finished. nDRDY should stay high then. This would indicate that the device is ready for communication.
Unfortunately the digital designer is on holiday already and I cannot confirm with him right now.

Regards,

Thank you for your reply!

I will try to attch the images again.

Here is the schematic I designed:

And here is the pulse on DRDY pin after power up:

Thanks user6519081.

That worked. Could you tell me which resistors you have populated on the M0, M1 and M2 pins?

Regards,

Sorry, I just realized you mentioned the M0, M1, and M2 connection in your original post.

Regards,

M0 tie to 3V3 by a 10kΩ resistor;

M1 tie to GND by a 10kΩ resistor;

M2 tie to GND by a 10kΩ resistor;

Actually，I have read the STAT_M2 register by SPI, it indicates the M0~M2 in a expect config.

Thanks user6519081.

I have reached out to some colleagues internally to see if they know what could be going on here.
All ADCs are disabled by default, therefore I don't see how the device could be converting.

Did you read back the ENA[3:0] bits by any chance to see if they are really 0000b after power-up?

Regards,

Thank you very much!

I read the ADC_EN register, it is 0x00. And when I did not send the UNLOCK command, WAKEUP command, the DRDY pin perform 640Hz pulse. But when I try to read the conversion value, all of the channels were read 0x000000, which may indicates the ADC is not in a working mode. If I only write 0x0F to ADC_EN register to enable ADC channels without WAKEUP, the conversion value is read right.

This is really very odd. I would not expect this behavior from ADS131A02.

All I can do at this moment unfortunately is to wait for some inputs from my colleagues. I'll get back to you as soon as I hear back from them.

Just as a sanity check, could you probe the nSC, SCLK, DIN and DOUT signals to make sure there is really no communication ongoing after power-up?

Regards,

Thank you,

I even tried to remove the MCU, leave the ADS131A02 alone on the board, which means no connections on the SPI pin. But it performed the unexpect behavior everytime after power up. Is there a problem with the chip? But the chip is applied from the TI official.

It is probably normal behavior. I need to get feedback from our design team though to be sure. I should have an answer for you latest by Monday after the holidays in US.

Regards,

Thank you very much and look forward to your reply.

I heard back from the design team. They ran some simulations which confirmed the behavior you are seeing in asynchronous slave mode.

After power-up, DRDYn pulses at the data rate even when the device is locked and the ADCs are disabled. However the digital filters are held in reset and the analog circuitry is powered down. That is why you are reading all Zeros as the conversion results for all ADC channels.

Regards,

Thanks，

So, what I see is the normal behavior. When the chip power-up, it outputs default pulse on the DRDY pin, so the MCU can catch the signal although the ADC is not really working, which makes me mistakenly think the ADC conversion is start . In fact, I don't think it is reasonable, the DRDY pin is not supposed to active when the ADC is not really working. 

Finally, thank you for your patient reply!