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ADC12D500RF: Using dual channel to double the sampling frequencey of a single analog signal

Part Number: ADC12D500RF

Case Number CS0364929:

Good morning, and good 2021 !

We need to update ax existing board using old device with parallel LVDS interface.

I saw that this is part of ADC12D device family and we would like to address sampling frequences up to 1 Gsps, though Parallel LVDS interface

The main question is: is there any drawback, in terms of precision or performance limitations, applying ADC12D500RF to sample a single channel @ 1Gpbs, by setting up both ADC provided by the device in interleaved mode ?

It would be better to use DESIQ mode sampling analog input only on "I" input ( or Q, possible in ECM mode), or DESCLKIQ bringing the same signals to both Vin_I and Vin_Q pins and sampling the two channels as independent?

Looking at 6.3.1.4 of device datasheet, colud someone give me info about the bandwitdh loss I will have adopting DESIQ mode ?

Many thanks

  • Hi Paolo,

    If you need best BW and performance I would suggest nonDES mode and only use/drive one channel, I or Q.

    Yes, in nonDES mode the D500RF ADC will have slightly better ENOB/SNR and SFDR performance. This can be found in the performance plots of the datasheet on pages 38-41. As the part goes higher in samples rate...D800RF, this performance deviates even more.

    For the BW loss, if DESIorQ mode is used, then you see about half the analog input BW. This is because the two ADCs are connected together internally, which creates a harder input load to drive, 50ohms vs. 100ohms in nonDES. The analog input BW between these two modes is shown on page 21.

    Regards,

    Rob