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ADS7828: ADS7828 Data Hold Time requirement

Frank Xiao
Genius 12055 points
Part Number: ADS7828

Hi team,

My customer is using the ADS7828 now, for the data hold time max 3.45us, whether it's only related to 100khz? For the time calculation whether it's 10%~90%. Currently the customer's Data Hold Time is even above 10us, whether it's ok? Thanks.

  • 0
    TI__Mastermind 24970 points

    Hello, 

    The data hold time is listed based on the bus speed used, thus 3.45 is based on standard mode of 100Khz.

    If the data hold time is longer than 10us at 100Khz, then you would be violating the data setup time, thus this will not work. 

    I would recommend staying within the bounds given by the timing requirements

    Regards

    Cynthia

  • 0 in reply to Cynthia
    TI__Genius 12055 points

    Hi Cynthia,

    My  customer's real clk frequency is 30khz(below 100khz), not sure whether it can support 10us hold time, based on my understanding about the I2C, it should be yes. May need your help to double check. Thanks. 

  • 0 in reply to Frank Xiao
    TI__Genius 12055 points

    Hi Cynthia,

    Do we have some update? Thanks.

  • 0 in reply to Frank Xiao
    TI__Mastermind 24970 points

    Hello Frank, 

    The hold and set up time do scale with the clock frequency, thus I would agree that the current rate it fine.  

    As you noted these are timing specification for I2C protocol specifications. 

    Looking at the scope shots, there should not be any issues.

    In general, the SDA data needs to change while SCL is low, and need to be stable while SCLK is high. On the 9 SCK is where there seems to be a concern, the microcontroller host should be able to change the data as in the other transmissions. 

    Regards

    Cynthia