I am designing a PCI Express board with ADC12DJ3200 and data-capturing FPGA.
Analog power is separated from digital power at board connector, but they are common at system power.
In addition, ground for analog input and for clk /trigger are also combined at the signal generator.
I designed a board as “GND_Separated.png" (first figure).
AG and DG are connected at one point near ADC (colored in purple in the figure).
DG pins on ADC are connected to DG plane on this board (like figure3 in SLYT499).
But I am concerned that separating AG and DG might make the board susceptible to noise from signal generator,
because a large ground loop from signal generator to AG-DG mixing point is structured.
Also, ADC12DJ3200 datasheet says that AG and DG pins should connect to a common ground plane.
With the help of technical documents SLYT499 and SLYT512, now I am planning to revise the board like “GND_Common.png” (second figure).
- AG and DG plane are merged on front side, although there is a slit on back side (near the switching regulators).
- Both AG and DG pins on ADC are connected to AG plane (like figure2 in SLYT499).
Is this grounding method appropriate?
Are there any other recommendations for this board?
