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ADC12DL3200EVM: Reference Design Configuration

Alec Huang
Prodigy 105 points
Part Number: ADC12DL3200EVM

Hi,

I wanted to use the reference design at a lower data rate (2500 Msps), so I followed the user guide p.16~20 and change the lane rate to 1250 MHz, but failed time requirement. Is there any other thing I have to change?

This is a screenshot of failed route (only 1 path failed).

Alec

  • 0
    TI__Guru* 91947 points

    Alec,

    This was designed by a third party that is no longer available to TI. I would suggest contacting Xilinx. I will try to get our firmware expert to take a look at this but he is currently on vacation and this may take awhile as his bandwidth is very limited right now.

    Regards,

    Jim