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ADS8556: Daisy chaining a single serial output to a single SPI port

Chris Weinman
Prodigy 20 points
Other Parts Discussed in Thread: ADS8556

Hi,

I need sample 60 analog channels simultaneously and read the results through a single 8 bit SPI port.  I would like to daisy chain 10 ADS8556 ADC ICs, using only SDO_A, and read out the results with a microcontroller.  Will this work?

Is it possible to daisy chain such that data from all the channels is read over a single serial output?

How exactly does the daisy chaining work?

Is there a maximum number of ADS8556s that can be daisy chained?

Can we stop the serial clock between bytes?  The data sheet gives a maximum serial clock period of 10us.

Do any application notes exist that cover the ADS8556 daisy chained?

Thanks in advance,

Chris

 

 

  • 0
    TI__Guru**** 180741 points

    Hi Chris,

    This should work fine!  You can set up the ADS8556 so that all serial streams come out through SDO_A.  This is accomplished by setting SEL_B = SEL_C = 0.  For multiple parts configured the same way, you would feed SDO_A into the DCIN_A of the next part upstream.  The data is a simple serial shift based on the SCLK applied to the part, so stopping the clock between bytes should not pose any problems as long as the delay between bytes is reasonably short (less than 5uS). 

    In theory, there is no limit to the number of devices in the chain - there may be practicle limitations based on your desired throughput and clock speed though.  At the moment there are no application notes on daisy chaining with the ADS8556, as soon as we do have something though I will let you know.

  • 0 in reply to Tom Hendrick
    Prodigy 20 points

    Thanks for the quick reply!  

    Another concern that I had regards the power supplies.  The datasheet states 'When HVDD is supplied before AVDD, the internal ESD structure conducts, increasing IHVDD beyond the specified value.'

    Does this mean that the device may be damaged if this condition occurs, or that it simply draws more current from HVDD than specified.   Do I need to ensure that HVDD is not supplied if AVDD is not present?  Does this also apply to HVSS?

    Thanks,

    Chris

  • 0 in reply to Chris Weinman
    TI__Guru 55466 points

    Hi Chris,

     

    The AVDD supply locks the ESD cells.  If HVDD comes on first; current will flow through the internal ESD cell for a short period of time.  In my opinion, I would always try to avoid conditions where the ESD cells are conducting; this could potentially cause a latch-up condition or put the device in an unknown state.

     

    To avoid the uncertainty of putting the device in an unknown state condition, I recommend that the 5V analog supply comes on first and afterwards bias the HV supplies. 

     

    Thank you,

    Regards,

     

    Luis