Hi there,
This is a follow-up to my previous question about cascading multiple DDC232 converters. My research group has produced some new circuit boards with the DDC232 chip and so far we have been able to use 1 and 2 boards together, with everything working well. Unfortunately, we run into problems when adding a third or fourth board.
The configuration we use is:
- 20-bit resolution
- Readout before and after CONV toggles
- 170us integration time
- 350pC full-scale range
- 10MHz CLK
- 20MHz DCLK and CLK_CFG
- OR gates to propagate DVALID across boards
The problem we are facing at the moment is that we observe some "mirroring" in the values of the same inputs in the 2nd and 3rd boards in the chain (where the 1st board is connected to the FPGA). For example, if light is shone on the photodiode connected to input 1 of the 3rd board in the chain, then we observe an increase in the value corresponding to input 1 of the 2nd board. And so on. We cannot confirm if the mirroring is exact, but there is a clear influence. We also observe an increased noise/fluctuation in the readings of the 2nd and 3rd boards when 3 boards are present. This increased noise is not present in the 2nd board when only 2 boards are in the chain. The board connected to the FPGA behaves normally regardless of the number of boards in the chain.
The steps we've taken so far to diagnose the problem are:
- Confirmed that "mirroring" was present in actual data sent to the FPGA, to rule out an FPGA or PC error. We did this by looking at the data coming in on DOUT using Vivado's Integrated Logic Analyser.
- Slowed down DCLK to 10 and 5 MHz – this did not appear to make any difference.
- With an oscilloscope, checked the delay in DVALID, DCLK and CLK across boards. We only measured a delay on the order of 2-4 ns, which shouldn't be significant enough to cause problems with a 20 MHz DCLK.
Are there any further steps that you can suggest we take? Any pitfalls to look out for? My suspicion is that there may be a problem with how DIN and DOUT are tied that creates issues with 3 or more boards.
Unfortunately I cannot share publicly the design of the circuit board, but I'd be happy to share this and some of our results in private, if someone is able to discuss this further. I should add that I personally did not design the circuit, but rather it was made for my group by a collaborator and so I am not an expert on circuit design.
Many thanks,
Saad
