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ADS42LB69: IQ bandwidth

SM
Expert 1750 points
Part Number: ADS42LB69
Other Parts Discussed in Thread: ADC12DL3200

Hello,

     We are looking to receive a 500MHz signal bandwidth as I and Q using the ADS42LB69 being sampled at 250MSps. Do you advise doing so/ any problems to anticipate?

The RF signal will be converted to baseband (centered at 0 Hz)using a IQ demodulator and subsequently digitized with the ADC. 

We are already familiar with this IC and would like to use it. Also, we do not wish to transition to a JESD interface IC for various reasons. 

Is there a 1GSps dual channel ADC with a parallel LVDS interface (prefer 16bits) so that we can also consider centering the IF at 250MHz and then performing the quadrature conversion inside the FPGA. However this seems to be more work inside the FPGA. 

Looking forward to your inputs and thank you for your help,

  • 0
    TI__Guru* 91947 points

    Hello,

    This will be hard to do with the ADS42LB69. There is no room for filtering within the alias band. You will need at least a dual 400MSPS clock rate device. TI does have a 12-bit dual 3.2Gsps LVDS part called the ADC12DL3200. This is released and can be found on the TI website.

    Regards,

    Jim