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ADS131A02: Regarding low current consumption above low-power mode

user5994067
Intellectual 820 points
Part Number: ADS131A02


Hi,

The data sheet states that the typ current consumption in Low-power mode in AVDD is 0.9mA

and the typ current consumption in Low-power mode in IOVDD is 0.5mA.


Is there any way to reduce the current consumption more than this?


For example, what is the current consumption if AVDD is set to 0V and the RESET pin is set to L level?

(Is it possible to use it in this way?)


During the conversion operation, the host CPU applies AVDD = 5V,

the RESET pin inputs the H level, waits 4.5 msec or more, and waits for the READY word.

Best Regards,

  • 0
    TI__Guru 66906 points

    Hello,

    Thank you for your post.

    Low-power mode is a mode of operation in which the delta-sigma modulators convert using a slower modulator clock frequency (up to 1.05 MHz). The current is specified while all 4 ADCs are actively converting. Total power consumption can be slightly reduced by slowing down the external master clock and/or by increasing the clock divider ratios set in the CLK1 and CLK2 registers.

    Additional power can be saved by disabling the ADC channels. The device enters standby mode by default after a power-on reset (POR). Setting the RESETn pin low also resets the device registers and disables the ADC channels. You may leave the power supplies enabled to allow for faster recovery time since the device will consume minimal power in standby mode.

    Regards,

    Ryan