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Original question:

ADS131E04: Single ended input and input voltage range

ADS131E04: Best way to use the ADC with 0-1.8 V single ended inputs

Stefano Infante
Expert 2310 points
Part Number: ADS131E04
Other Parts Discussed in Thread: ADS131E08

Hello,

I have to use ADS131E04 in order to acquire data from a 3-axes accelerometer. The sensor outputs data in the 0-1.8 V range (nominally 0.1 to 1.7 V), in single-ended mode.

What is the best way to use the ADC in order to get the best dynamic range? I can act on AVDD, AVSS, VCM (common voltage on negative inputs), VREF and PGA gain, while I would like to keep DVDD to 3.3 V.

Changing the ADC is not an option, as all drivers are already up and running and time is an issue.

The sensor outpus have 32 kohm series resistors, and I will add 10 nF (parallel) capacitors in order to filter outputs to about 500 Hz.

From the original question, I think of this possible solution:

  • AVDD = 2.5V
  • AVSS = -2.5V
  • VCM = 0V (or DGND), connected to all INxN inputs
  • PGA gain set to 2

1) Is this solution ok? If it is not, can you please suggest a correct (or better) solution?

2) If this solution is ok, should I connect AVDD1 to AVDD, AVSS1 to AVSS and refer all VCAPx capacitors to AVSS (-2.5V)? And can I use 3.3V for DVDD and 0V for DGND?

3) Being VCM = 0, the input signal span is -VREF/Gain to +VREF/Gain. How can I set VREF in order to have the best dynamic range? What should I connect exactly to VREFP and VREFN? In the "Recommended Operating Conditions" table (§ 7.3) the nominal VREFN is set to AVSS, does it mean I should connect VREFN to AVSS (-2.5V) and VREFP to AVDD (+2.5V)? Or can I use a lower reference (for example: VREFN to AVSS, VREFP to 1.1 or 1.5 V)? As my inputs are in the 0-1.8V range, I would lose more than 1 bit of dynamic range, but this should not be a problem. I would prefer to use an external reference to have better performance, but, of course, using AVDD and AVSS would be a simpler solution.

4) When using an external reference, is using a buffer circuit (Figure 29, § 9.3.8 in the data sheet) always a good practice?

Thanks in advance for your help.

Stefano

  • 0
    TI__Guru 62506 points

    Hello Stefano,

    Thank you for your post.

    According to the input common-mode voltage equations on page 23 of the data sheet, you will only be able to use a gain of 1 with an input signal range of 0 V to 1.8 V (INxN = 0 V). At Gain = 2, the positive PGA output will exceed the +2.5-V AVDD supply (see attached Excel sheet).

    You could apply a DC voltage to the negative channel input. If INxN = ~ 1.1 V, this would allow you to use a gain of 2. Since the max differential output from the PGA will only be about 1.4 V, you can use the smaller internal reference voltage setting of 2.5 V to utilize more of the ADC's full-scale range.

    Do you have the option to add other components to the signal chain? A fully-differential amplifier can be useful for converting a single-ended signal to a differential signal while setting the output common-mode to mid-supply. This would also allow you to use the maximum gain on the ADS131E08.

    ADS131E08_Input Range_E2E.xlsx

    Regarding your other questions:

    • Yes, all analog supplies and bypass capacitors should be referenced to AVSS. DVDD = 3.3 V and DGND = 0 V is also ok.
    • The minimum reference voltage is 2 V (see Recommended Operating Conditions). 
    • If you choose a more precise external reference voltage, it is recommended to buffer the reference output as shown. The internal reference buffer is bypassed when using an external reference. The buffer presents a high input impedance to the reference voltage source and drives the current required to charge the internal reference sampling circuits on each ADC channel.

    Regards,

  • 0 in reply to Ryan Andrews
    Expert 2310 points

    Hi Ryan,

    thanks for your reply.

    I have little room on my board, and generating a -2.5V line will take quite a lot of that room. So I would prefer not to add an amplifier. If I will find the room, I would prefer to use an external reference: the sensor's noise will cover a few bits of the ADC, so I think adding precision would be a better choice.

    About the DC voltage on INxN, could it be a 1.2 V reference voltage?

    Then my solution 1 would be (all voltages referred to DGND or 0V):

    • AVDD = 2.5V
    • AVSS = -2.5V
    • VREFP = 1.2V (reference output)
    • VREFN = -2.5V
    • INxN inputs = 1.2V (reference output)
    • PGA gain set to 2

    Voltage reference ground pin will be of course connected to DGND.

    Solution 2 would be:

    • AVDD = 2.5V
    • AVSS = -2.5V
    • VREFP = 1.2V (reference output)
    • VREFN = -2.5V
    • INxN inputs = 0V (DGND)
    • PGA gain set to 1

    Finally, solution 3 (if I have no room for an external reference) would be:

    • AVDD = 2.5V
    • AVSS = -2.5V
    • INxN inputs = 0V (DGND)
    • internal reference set to 4V
    • PGA gain set to 1

    Questions:

    1. Are all three solutions good?
    2. Would solution 1 be better that solution 2 in terms of overall precision?
    3. If I use solution 1, I think reference output current would be negligible (a few mA at maximum), would it be?

    Thanks again and regards,

    Stefano

  • 0 in reply to Stefano Infante
    TI__Guru 62506 points

    Hi Stefano,

    Yes, these solutions look ok. Your reference voltage to the ADC would be 3.7 V when VREFP is driven to 1.2 V, which is close to the nominal 4-V reference for a 5-V supply. 

    One note about the external reference "GND" pin - it is advisable to keep the digital ground somewhat separated from the analog circuitry as much as possible in ADC systems. I think using a solid ground plane is preferred is most cases, but you can still place components strategically into analog and digital sections in order to reduce noise coupling.

    An alternative approach to using a 1.2-V reference (with the GND pin connected to DGND) is to use AVSS as your reference IC "GND" and look for a 3.3-V reference IC instead. The output would be regulated to 3.3 V above the GND pin, which is forced to -2.5 V, so VREFP would be +0.8 V with respect to the PCB ground. This approach would be a little cleaner as VREFP is compared against VREFN = AVSS to form the ADC reference voltage and any noise on AVSS should cancel.

    I'm reattaching the Excel sheet with updated calculations. A 3.3-V reference will work well for the nominal input range of 0.1 V to 1.7 V (VREFP = INxN = 0.8 V). I recommend connecting the reference output to the INxN pins before the reference buffer input, and not connecting the amplifier output to both INxN and VREFP to reduce noise coupling.

    2703.ADS131E08_Input Range_E2E.xlsx

    The common-mode voltage that you apply to INxN could also come from a simple resistor divider between the supplies if you cannot find a reference voltage value that works for this application.

    The larger gain settings of the PGA will improve the noise performance of the signal chain by lowering the input-referred noise of the ADS131E08. Therefore, I recommend using Gain > 1 if at all possible. 

    Best regards,

     

  • 0 in reply to Ryan Andrews
    Expert 2310 points

    Hi Ryan,

    connecting the reference ground pin to AVSS looks great. I will have to check the reference input voltage against VIN + 2.5 V, but this shoud not be a problem.

    The 3.3 V reference would work for a nominal input range of 0.1 V to 1.7 V, but, as you can see on the excel sheet, at 1.8 V it would violate the common mode maximum limit. I cannot be sure my input voltage will always be in its nominal range, and should take some tolerances into account. A 4 V reference, again, would violate the maximum common mode when INxP goes down to 0 V. I would need a 3.7-3.8 V reference in order to not violate any limits, but I cannot find one... How can I solve this issue?

    Thanks again and regards,

    Stefano

  • 0 in reply to Stefano Infante
    Expert 2310 points

    Ryan,

    I made some calculations on my accelerometer, and I can confirm that in the worst case (highest sensitivity, highest offset, highest possible - realistic - temperature drift) its output can go down to 0 V and up to 1.8 V, that is, 100 mV away from the nominal upper and lower outputs.

    So I think I will go for a 2.5 V reference, with VREFN connected to -2.5 V (AVSS), and keep the PGA gain to 1.

    I would eventually try to use a 3.3 V reference (one that is pin-to-pin compatible with the 2.5 V one) in order to rise PGA gain to 2 and see if I can improve the output precision.

    What do you think about that?

    Regards,

    Stefano

  • 0 in reply to Stefano Infante
    TI__Guru 62506 points

    Hi Stefano,

    At Gain = 1, a 2.5-V reference should give plenty of margin to satisfy the input common-mode range. 

    You might try a 3.3-V reference anyway and see how well it performs in your application. The input common-mode mode range is to give the most linear output swing, but the circuit will, of course, still be functional if the input signal exceeds it. It sounds like the probability of that happening in your application is very slim. In the end, it's up to you to decide how much margin you need to design for.

    Alternatively, you might recover some of the effective resolution by reducing the output data rate, which limits the noise bandwidth, and also by averaging back-to-back samples (for DC signals).

    Best regards,

  • 0 in reply to Ryan Andrews
    Expert 2310 points

    Hi Ryan,

    I will try both solutions and see what happens.

    Thanks for your help.

    Stefano