• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Subscribers 46 subscribers
  • Views 760 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS1292: possible improvement input-referred

alexis long
Prodigy 120 points
Part Number: ADS1292
Other Parts Discussed in Thread: INA826S, INA826, INA114, ADS1298,

Hello,

My project needs a very low input-referred noise of ideally 1uV peak-peak, but at least 5uV peak-peak.

I am thinking about ways to decrease the input-referred noise. The input-referred noise of the signal conditioning circuit (from AFE input to ADC input) seems to be non changeable. But, the ADC noise can be reduced using an external clock (reduce jitter) and external reference (higher voltage accuracy) and tuning the external capacitance of the anti-aliasing filter (to achieve desired channel bandwidth considering settling time).

However I plan to utilize a PGA gain=12 and sampling rate SPS=500, and knowing that the AFE input-referred noise = sqrt(Vsc_rms^2+(Vadc_rms/PGAgain)^2) with Vsc_rms and Vadc_rms the signal conditioning circuit and ADC input-referred noise voltage rms, it seems that the ADC noise is probably responsible for only a small proportion of the AFE noise.

Anyway, I could use an external clock of 5ps jitter and external reference of 0.04% initial accuracy and I would tune the external capacitance for 3dB channel bandwidth at 80Hz. I see mathematically how the changing the anti-aliasing filter can change the input-referred noise, but that's not the case for the external clock and reference.

Do you know to which extend the input-referred noise could be reduced?

Thanks

  • 0
    TI__Genius 11550 points

    Hi Alexis,

    The internal clock oscillator accuracy specification listed in the datasheet is fully characterized and evaluated. We also tested all devices in the final production environment to ensure they met all the datasheet specifications. If the device's noise specification limits the design, then adding additional gain stages can improve the signal-to-noise ratio of the signal chain.

    Thanks.

    -TC

  • 0 in reply to TCT
    Prodigy 120 points

    Indeed, the most interesting method would be to use a pre-amplifier.

    I would use the INA826S (mostly because of its small size).

    I found on this forum the attached picture. I could do something similar (with ADS1292 and INA826S and electrodes are for EEG, instead of ADS1298 and INA114 and ECG electrodes). Nevertheless I am worried about the pre-amplifier output offset since both INA114 and INA826 have input offset voltage around 25uV and EEG signal amplitude varies between 1-100uV. Should not there be an offset trimming circuit (see attached figure)? If yes, is it possible to have much smaller offset trimming circuit?

    Thanks

  • 0 in reply to alexis long
    TI__Genius 11550 points

    Hi Alexis,

    The design of the pre-amp with offset calibration is out of my expertise area.  I recommend you check with the Amplifier E2E forum for further advice on your design requirements. I listed the link to some IA resources available in the E2E forum that you may find helpful. 

    Learn more about IAs here.

    Thanks.

    -TC