Hi,
Could you please help to check the schematic, thanks.
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Hello Jim,
This schematic looks good to me. Based on the sizing of the voltage divider for the 3.3V voltage sense inputs, it looks like a gain setting of +/-2.048V will maximize your input range for the most precision. It looks like this was already taken into account for the design.
My only other recommendation would be to make sure the decoupling capacitor for the VDD input is as close to the TLA2024 as possible in the final layout.
Regards,