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ADS1261: Offset and Gain Calibration

Ram Ch
Prodigy 120 points
Part Number: ADS1261
Other Parts Discussed in Thread: ADS125H02

Hello,

I am operating ADS1261 with external 2.5 volts reference from AIN0/AIN1 channels. I have a sensor which outputs 0.5 to 4.5 volts and it is scaled as +/- 2 volts ADC input. I would like to perform the offset and gain calibration for the adc readings. below is the sequence of steps followed during the ADC initialization.

1) Initialize ADC (100SPS, Sinc1, pulse conversion, external reference (AIN0, AIN1), PGA bypass)

2) send adc START command

3) send SFOCAL Command

4) Wait for DRDY low (It takes 171.34ms approx.)

5) configure AIN0, AIN1 as input channels via INPMUX register

6) send adc START command

7) send GANCAL Command

8) Wait for DRDY low (It takes 171.34ms approx.)

Q.1) Is the above sequence of offset self calibration and gain calibration is correct? I have selected AIN0, AIN1 as input channels for the gain calibration, Is this correct for the sensor range I have mentioned?

Q.2) Does above offset and gain register values are applicable for other ADC sampling rates as well?

Thanks,

Ram.

 

  • 0
    TI__Guru 51746 points

    Hi Ram,

    Yes, this procedure looks mostly correct. You should not have to configure AIN0/AIN1 in Step 5 if you have already done so in Step 1. You also need to make sure that you apply a shorted input signal for the offset calibration and a full-scale signal for the gain calibration. This is not done automatically by the ADC.

    And yes, this procedure should be applicable for other ADC sampling rates. However, it might be a good idea to check a few other data rate/filter type options just to be sure the calibration coefficients are within your target accuracy range.

    -Bryan

  • 0 in reply to Bryan Lizon86
    Prodigy 120 points

    Thank you Bryan.


    In Step1, REF register is configured with AIN0/AIN1( external reference 2.5 volts) as part of ADC initialization.


    In Step5, I have configured AIN0 and AIN1 as positive and negative input mux channels via INPMUX register. As per section 9.4.7.4, "To calibrate, apply a positive full-scale calibration voltage to the ADC, wait for the signal to settle, and then send the calibration command". By reading this statement, I thought AIN0 and AIN1 can be the positive full scale calibration voltage to the ADC. The range of the sensor I am working is +/-2 Volts. Does configuring AIN0 and AIN1 will work as full scale signal for gain calibration? Please suggest.

    Coming to offset calibration, as per section 9.4.7.2, "When the offset self-calibration command is sent, the ADC disconnects the external inputs, shorts the inputs to the PGA, and then averages 16 conversion results to compute the calibration value." I think ADC will do the offset calibration automatically right. Is my understanding correct?

    Thanks,

    Ram.

  • 0 in reply to Ram Ch
    TI__Guru 51746 points

    Hi Ram,

    Thank you for clarifying, I did not realize in your first initialization that you were selecting AIN0 and AIN1 as the external VREF inputs. I believe I interpreted that as you were using an external reference and had selected AIN0 and AIN1 as the input channels.

    However, you could select AIN0 and AIN1 as the input channels during the initialization as well. As you correctly stated, the ADC disconnects the MUX channels and internally shorts the PGA inputs together for the offset calibration, so it does not really matter which inputs are connected during this process. My comments were mis-applying the operation of the ADS125H02, which is a sister-device to the ADS1261, that does not offer this functionality.

    For the gain calibration: it is okay to use the same voltage reference as the ADC input and VREF input. However, you would not be able to calibrate out the VREF gain error in this way, as it will show up equally in the measurement and the reference voltage. In other words, you would only calibrate out the PGA gain error. If you wanted to calibrate out the VREF gain error as well, you would need to apply a full-scale input from a precision source.

    -Bryan

  • 0 in reply to Bryan Lizon86
    Prodigy 120 points

    Thank you Bryan...

    I am seeing different offset, gain register values when run in PGA bypass and PGA mode (gain =1). Ideally both these configurations should give same offset, gain values right?

    Also, when calibration is ran in PGA mode (gain=1), I am seeing PGAL_ALM bit is getting set. I am not sure why it is getting set. Since, I am using AIN0 and AIN1 as reference. (VDD is +5V and VSS is connected to Ground, for your reference). Please suggest your inputs.

    As per table 7.3, Differential input voltage range is +/-Vref/Gain. Does this mean, we always need to measure differential inputs in PGA mode? Please suggest.

    Thanks,

    Ram.

  • 0 in reply to Ram Ch
    TI__Guru 51746 points

    Hi Ram

    As you can see from the block diagram below from the ADS1261 datasheet, the PGA enabled vs bypass paths are different. With the PGA enabled, the input signal must pass through the amplifier stage, so I would expect the offset/gain to be different with PGA enabled vs bypassed.

    For the PGA_ALM bit: note the requirements in Equation 5 in the ADS1261 datasheet (pg. 31). With the PGA enabled and G = 1, the absolute voltage on each input must be between AVSS+0.3V and AVDD-0.3V. This is to keep the input signals within the common mode range of the PGA, and avoid the PGA's nonlinear region of operation. As a result, a 0V and 5V input voltage violate both of these requirements, setting the PGA_ALM flag high. If you intend to have this voltage range, you might consider disabling the PGA.

    Finally, the ADC always takes a differential measurement between the voltage applied to AINP and the voltage applied to AINN. You may have applied 0V to AINN and 5V to AINP, which is technically a single-ended measurement, but the ADC always treats the measurement as differential (VIN = AINP - AINN)

    -Bryan