Part Number: ADC16V130EB
This is Hemila.S from HCL Technologies.
We have been testing the ADC evaluation board [PART NUMBER : ADC16V130].
The input condition for the clock is the default one(160 MHz) and 76.5 MHz feeded to the RF input with different power levels.
We need to get the ENOB as 12.5 but we are getting less than 6. Also there is a power lag in the testing.
We have done for input power levels [ -20 dbm, -10 dbm, 0 dbm, 5 dbm].
Kindly see to that if the procedure is correct and let us know if any changes to be made.
