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AFE5809: Consideration for calibration?

Part Number: AFE5809

Team,

Customer is evaluating the AFE5809 and trying to do some calibration in order to scale the sampled voltage accordingly.

A given test pattern is provided but the converted values have a lot of variation depending on the LNA, VCAT and PGA settings used.

Could you shade some lights on how calibration should be performed? Is the methodology correct? What are the consideration to take into account?

A custom PCB with AFE5809 is used to measure dynamic voltage in a frequency range up to 450 kHz. The AFE5809A is configured as follows:
-Sample frequency 10 MHz.
-LNA, VCAT and PGA gains are set according to the table below.
-The demodulators decimation filter is enabled, the down conversion block and the DC removal block are bypassed.
-The DC shift (DEMOD register 0x1D) is set according to the scaling of the filter coefficients loaded into the coefficient RAM.
-Decimation factor is 10.
-The internally-generate reference voltages is used for the ADC.

The data is collected with an FPGA and forwarded to a windows host.
The goal is to calibrate or scale the data to get voltage.
However, with the scaling factors, i.e LSB (least significant bit) calculated from the gains set for LNA, VCAT and PGA  the measurement results are different (for the same signal) when using different input ranges.  

For example for a 100 kHz sine with a RMS of 35.4 mV I measurements of:
34.6 mV at +-500 mV range (1000 in table below)
33.3 mV at +-250 mV range (501 in table below)
33.0 mV at +-125 mV range (251 in table below)
31.9 mV at +-95 mV range (189 in table below)
30.3 mV at +-50 mV range (95 in table below)

We cannot guaranty the signal is exactly 35.4 mV rms but we would expect, that my results are at least equal, regardless which gain settings I use as long as no stage is overloaded.

Is the LSB calculation wrong? Or is the assumption that the gain matches exactly the value set is too optimistic?

max. Input Voltage (nominal)                                    
LNA    1000    mVpp    at 12 dB                            real maximum input range of LNA seems to be about 1250 mVpp
ADC    1500    mVpp    => LSB    0,022888            at    16    bit        32768    digits half range

Maximum Input Range in mVpp

Gains [dB]

Resolution

Range

LNA

VCAT

PGA

ADC*

ADC

LNA

VCAT

PGA

LSB

Range (digits)

1000

1000

3981

63,10

1000

1000

12

-36

24

0,022888

+-

21845

501

501

3981

63,10

1000

1000

18

-36

24

0,011471

+-

21845

251

251

3981

63,10

1000

1000

24

-36

24

0,005749

+-

21845

189

251

3981

125,89

1995

1500

24

-30

24

0,002881

+-

32768

95

251

3981

251,19

3981

1500

24

-24

24

0,001444

+-

32768

47

251

3981

501,19

7943

1500

24

-18

24

0,000724

+-

32768

24

251

3981

1000,00

15849

1500

24

-12

24

0,000363

+-

32768

12

251

3981

1995,26

31623

1500

24

-6

24

0,000182

+-

32768

6

251

3981

1995,26

63096

1500

24

-6

30

0,000091

+-

32768

Thanks in advance,

A.

  • Hi,

    Please accept our apology for the delayed response. 

    It is simple to map the ADC code to ADC input voltage. ADC output code when swing peak to peak of 2^16 codes, it will mean that input signal to the ADC is 2Vpp. This is for the case of demod having 16 bit resolution and assuming decimation filter gain is 0dB. If there is decimation filter gain then it has to be adjusted in the calculation. So for any peak to peak code swing of say C, the input voltage swing of ADC will be C*2^16/2 V. So now you can convert the digital code to voltage input to the ADC which will be independent of LNA or VCAT or PGA gain. So whatever input signal is applied to the AFE input, convert it to the expected input to the ADC and compare it with the calculated ADC input voltage swing. Whenever from input side calculation, if ADC input goes above 2Vpp then ADC will saturate and will always give peak to peak swing of 2^16 codes. 

    Also one more thing which you need to take care of is signal frequency. In device we have HPF so if HPF corner is higher than input signal frequency then there will be attenuation in signal based on difference between signal frequency and HPF corner. 

    Regards,