• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 46 subscribers
  • Views 296 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS1261: max common mode input vs PGA

Daniel Benjamin
Prodigy 120 points
Part Number: ADS1261

If AVDD is 5V, the inputs are set up as differential and both are pulled to the same 5V would there be any issues for the ADS1261 and max input voltages? Does this change with different PGA settings?

  • 0
    TI__Guru 51906 points

    Hi Daniel,

    With the PGA enabled in the ADS1261, the minimum absolute input voltage that can be applied to each analog input is AVSS + 0.3V, assuming gain = 1, while the maximum is AVDD-0.3V. Therefore, with the PGA enabled, you would not want to apply 5V to each analog input or you will be operating in the amplifier's nonlinear region. And you are correct, this relationship changes with gain - see equation 5 in section 9.3.2 on page 31 in the ADS1261 datasheet for more information.

    You can also check out the ADS1261's Excel-based calculator tool that helps visualize how the PGA's common-mode range changes with respect to input signal, gain, supply voltages, etc.: https://www.ti.com/lit/zip/sbac200

    -Bryan

  • 0 in reply to Bryan Lizon86
    Prodigy 120 points

    Thanks Bryan, that makes sense. Regarding the linear region -- I do not anticipate taking readings during this period where the inputs go up to 5V so would there be an issue? I'm mostly concerned about the ADS1261 just surviving having 5V on the AIN pins (and AVDD), which I think is OK per the absolute max ratings table but was getting tripped up by the impact of the PGA.

  • 0 in reply to Daniel Benjamin
    TI__Guru 51906 points

    Hi Daniel,

    You are correct that the ADC should survive an input of 5V even with the PGA enabled (assuming AVDD = 5V). The other concern I have is the PGA overload recovery time, or the time it takes the PGA to recover and operate properly after an overload condition. There is no definitive time for this in the datasheet, as it depends on the gain, the input signal, the data rate, the filter type, as well as external factors like any input filtering (I assume temperature might impact this as well). So, I would just keep this in mind, and maybe run some tests applying an overload condition and seeing how long it takes the ADC to recover under your specific settings.

    -Bryan