Hi team,
One of my customers is using ADC128S102QML-SP in their design. They wanted to confirm whether ADC128S102QML-SP has power down sequencing requirements for the digital and analog supplies (Vd and Va, respectively)?
They can control the power-up sequence for Vd and Va, but they will have to do something more elaborate if they need to guarantee the requirement in Section 6.1 of the data sheet that Vd < Va, +.3V, even briefly during power-down.
Thank you in advance for your support!
Errol
