Hi Team,
My customer is testing ADS114S08, they're using 6.2kohm input series resistor and internal reference, schematic of input stage as below, the gain is set to 1.
During the test they observe that the actual gain is 1.02, is this gain offset caused by the input series resistor? If so, why would this happen? In ADS114S08 function block, the input stage is a MUX, and I assume the Rds_on of the MUX FET won't be large enough to cause this gain offset. Or it's caused by PGA input resistor? Would you please give some comments on that? Thanks.
Best Regards,
Livia