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ADS124S08: Regarding the need for an LDO on AVDD

Darren (FAE)
Expert 5483 points

Part Number: ADS124S08

First, let me confirm my understanding of a few points:

The ADS124S08 DS specifies PSRR for changes in DC, or AC (50~60Hz) only, because any input voltage ripple on the supply is averaged out through oversampling. Because of this, to calculate the PSRR, you use Figure 68 (assuming DR = 4kSPS and Low-Latency Filter).

The rejection ratio rises as frequency increases, thanks to the internal filtering, correct?

To get the best rejection, you want to make sure the DC/DC switching frequency is not a harmonic of the 256kHz modulator frequency. Preferably, you would want to set the switching frequency to a frequency range that gives you the best rejection.

From the above understanding, it seems that using a DC/DC switching Buck regulator to generate AVDD = 5V should be fine; there is no need for an LDO as long as the input ripple and rejection you get from the filter reduces switching noise to below the desired resolution by some safety margin.

Just a simple calculation, but assuming a switching DC/DC regulator with an output ripple of 10mVpp, if you select the switching frequency / DR / Filter right, it should be possible to achieve >80dB attenuation (Figure 68), which results in ~1uVpp of output variation.

If the desired resolution was only 16bit, and the LSB of the system was ~20uV, this should provide enough margin to not require an LDO.

But if the ripple was larger, or the switching frequency variation put it in a worse-attenuated frequency range, you might run into trouble without and LDO.

Would you say this understanding is accurate?

  • 0
    TI__Guru** 113765 points

    Hi Darren

    I would say you are mostly correct in your assessment.  However, consider that the AVDD supply is also connected to the PGA and internal reference.  The noise may or may not be filtered out as expected.  The modulator is multi-order and should reduce most noise where the supply might affect the PGA.  It is also true that you can get by with some additional noise at the 16-bit level compared to the 24-bit level.

    The electrical characteristics table of the ADS124S08 is specified for AVDD at dc and AVDD ac at 50/60Hz.  These are the two most common conditions where in the dc case you are looking at stability of the supply, and in the ac case with respect to power line-cycle noise.  If the conditions were to change with respect to ac noise and frequency then the result may be different.  By using an LDO much of the ac component from the DC/DC converter will be reduced and the overall dc stability may also increase.

    In reference to figure 68, this is the digital filter response with respect to the input signal through the modulator.  This would be more applicable to the pathway of the system input signal and not necessarily would apply to the AVDD supply to all powered devices.

    All of that said, it is possible to use a DC/DC converter directly.  I have not seen any direct data for a buck converter, but some work was done previously on a boost converter using the ADS124S08 in TIDA-01434.  You may find the discussion there helpful.

    Best regards,

    Bob B