Setting time issue ADC08200 (90ns )

Raghavendra Mendon

Other Parts Discussed in Thread: ADC08200

We are using TI ADC part ADC08200 in one of the analog project (attached datasheet). Input to the ADC is analog pulse signal, digital output connected to FPGA. We are observing settling time of ADC around 90ns. Kindly let us know, how to reduce settling time ADC to around 10ns..

over 6 years ago

0 Jim Brinkhurst1 over 6 years ago

TI__Mastermind 43950 points

Hi Raghavendra

I believe this post is related to your other post here on a similar topic:

https://e2e.ti.com/support/data_converters/high_speed_data_converters/f/68/t/597471

It appears you are getting ringing in the signal applied to the VIN terminal of the ADC.

The first thing you could try is changing the 0 ohm resistor to some higher value to see if that helps, but adding an R-C pole in combination with the input capacitance at VIN. You may also be getting ringing in your analog amplifier signal upstream of this resistor. Please use an oscilloscope to verify the quality of the waveform at the output of the amplifier circuit.

Best regards,

Jim B

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Setting time issue ADC08200 (90ns )