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C28x Core registers

Yuanlong Li
Prodigy 30 points

Hi,

I am developing a programmer for TMS320F28 series used for inline test. We use Jtag port to access the chip. Recently after company signed some documents, we have received the Jtag emulation information from TI.

However there are still some information uncleared from the datasheet we received.

What we plan to do is to write the firmware to the ram via Jtag, then set the Program Counter and Stack Pointer correctly to run the firmware. Now we are able to access the memory, but seems reading or writting to Core Registers like Status Register and Program Counter is still not possible.

In document (spru430e) chapter 7.6, TI mentioned that the debug-and-test direct memory access provides access to memory, CPU registers, and memory-mapped registers. Also In CCS we can set the Program Counter through a debugger.

But with document (spruf82_c28 and sprue64), we can't access to CPU registers. (Although it says R/W for some Core Registers). Seems they are not memory mapped registers I can't find any useful information in other public documents.

 

In addition,  In spruf82_c28 chapter 3.2.2 , it says JXREG and FXREG is accessible through JTAG, but I can find no information about these registers or how to access it.

 

Do we have to apply for another document (contains these information)?

 

Thanks in advance

Yuanlong

  • 0
    TI__Guru* 92120 points

    Yanglong,

    I am going to move this to the code composer studio forum.  Someone there will be able to help.

    Thank you

    Lori

  • 0 in reply to Lori Heustess
    TI__Guru* 92120 points

    Yanglong,

    Someone is working on this, I apologize for the delay. 

    There is a related thread that I believe is also from your company: http://e2e.ti.com/support/development_tools/code_composer_studio/f/81/t/282128.aspx not yet answered.

    -Lori

  • 0 in reply to Lori Heustess
    TI__Intellectual 2515 points

    The CPU registers in the C28x are not memory mapped, but they are scanned out via the same ICEMaker commands as memory accesses.  When building the address to scan, you use a flag for Register instead of one for Data or Program memory.  

    Address Fields:

    26:24 MUCYC[2:0] Indicates the type of DT-DMA cycle to perform:

      0 = Program Memory

      1 = Data Memory

      2 = Register (see table of register indexes)

    ...

    23:0 ADDR[23:0] 24-bit address.


    C28x Register addresses:
    0   XAR0   (32-bit) 
    1   XAR1   (32-bit) 
    2   XAR2   (32-bit) 
    3   XAR3   (32-bit)
    4   XAR4   (32-bit) 
    5   XAR5   (32-bit) 
    6   XAR6   (32-bit) 
    7   XAR7   (32-bit)
    14  SP     (22-bit) 
    320 IC     (22-bit) 
    6   RPC    (22-bit) 
    224 ACC    (32-bit)
    256 P      (32-bit) 
    160 XT     (32-bit) 
    192 ST0    (16-bit) 
    11  ST1    (16-bit)
    12  IER    (16-bit) 
    13  IFR    (16-bit) 
    9   DBGIER (16-bit) 
    10  DP     (16-bit)
    8   ORIFR  (16-bit)


  • 0 in reply to Edward Fewell
    Prodigy 30 points

    Hi,

    I've met some problems during development.

    First, I can't make the IC work. For example, after halted the chip through Jtag I write to address 0xA000 a long branch command (SPRU430E) 0x0040B000 which should load the PC with address 0xB000. Then I set the IC to address 0xA000 and Step/Run. But seems there's no changes. I tried to read back from IC to see if it actually jumped to 0xB000, the strange thing is IC seems to be frozen. It won't change anymore. 

    I also tried to download the firmware to memory and set the IC to the starting address of it. But also failed.

    There's also one thing not clear. The address you provided, are they Hex? or Dec?

    Maybe you can give some advice?

     

    Yuanlong

  • 0 in reply to Yuanlong Li
    Prodigy 30 points

    To correct my words:

     

    In fact I found that even I set the flag to Register, the address I'm writting to is still Memory. ( On page23 of SPRUF82, the register flag is not 2, I'm quite confused)

    For example I scan in 0x79000140 into GPSR and 0x0000003f into EXSR and advance to Idle state then I scan in Bypass and 0 to shift the content out. I found the value shift out can also read by read memory at address 0x140.

    This explains why it is not working. I also found some problem with the Write Command. When I follow the instruction from SPRUF82, the second step to shift the acc_w command in will failed due to JXREG is not ready. So I just changed the order a bit. I first scan use GPRS as data command then scan loaddma. After that I have to scan the address command twice to make it work.

    Maybe this is the problem, could you give me some help?