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DLP670S: Custom made HDMI converter for Altera FPGA (Similar to EXP Bus in D4100)

Part Number: DLP670S
Other Parts Discussed in Thread: DLPC900

Hello, 

I need to develop a system with TI DMD DLP670S(5.4 micron pixel pitch) for deep tissue imaging.

It is needed to transfer 1MB image via HDMI(or faster port, if available) to DMD, and this image should be shown on DMD with at least 1Khz refresh rate. As I checked documentation, suitable evaluation board DLP Lightcrafter DLPC900 have an FPGA from Altera, but there is no detailed info about programmability acc. to customer demands. Besides, there is no EXP(expansion) connectors on it. 

For D4100 evaluation board, there was a possibility to develop custom-made HDMI bus via EXP connector on FPGA. I wonder that whether there is a similar solution for new generation of DMDs, like DLP670S.

Can you please support me technically ? Thanks in advance. 

Gorkem.

  • Hi Gorkem,

    Image data can be transferred on the fly using USB port. HDMI is used for only Video data.
    Please check section 3.3.1 Operating Mode in DLP® LightCrafter Dual DLPC900 Evaluation Module (EVM) User's Guide for DLPC900 supported operating modes.

    DLP670S DMD would need two DLPC900 controllers to drive full resolution of the DMD. Master and Slave DLPC900 controller will drive left and right portion of the DMD.
    Altera FPGA is programmed for splitting the incoming video data into left and right channels to feed master and slave DLPC900 controller.

    There is an external Parallel RGB Video Input connector J30 to input RGB Video data directly to FPGA input.
    Refer to Section 1.5 DLP LightCrafter Dual DLPC900 Connections in Dual DLPC900 Evaluation Module (EVM) User's Guide 

    As per my knowledge, there is no option to program FPGA based on customer needs. Let me check with my team and confirm on this.

    And please do check some of the below useful videos.

    Getting started: TI DLP® LightCrafter 6500 and 9000 EVMs

    https://www.youtube.com/watch?v=1BiGh6Gv-dY

    https://www.youtube.com/watch?v=fYAXy2jwGeg

    https://www.youtube.com/watch?v=0OYpDOSgqBc

     

    Configuring the DLPC900 digital controller chipsets for 3D machine vision applications

    https://training.ti.com/configuring-dlpc900-digital-controller-chipsets-3d-machine-vision-applications?context=1128188

     

    Thanks,
    Shivakuamar

  • Hi Gorkem,

    I thought I would add a little clarification to my colleague's answer.

    The FPGA is a much smaller FPGA than the one on the DLPLCR410EVM and as Shiva mentioned, it is solely dedicated to splitting the image data to the two halves of the DMD through the two DLPC900 controllers.

    In order to better assist here are some questions that will assist us in helping you:

    • Do you need to send 8-bit grayscale images or binary patterns (1-bit)?
    • How many images are you wanting to send, or is this a dynamic stream that changes on the fly depending on real time incoming data?
    • If a fixed set of patterns, how many?

    Fizix

  • Hello Shivakumar, Fizix,

    I would like to thank you for kindly support. Now I am much more confident about my problem. Let me try to formulate it again.

    There will be a constant stream of camera image data(holographic pictures). I can select my camera from alternatives like CameraLink, USB3.0, CoaXPress etc. Shutter speed will be very high, like 100 microseconds or lower. Images will be at least 2Mb.

    Q1 : Is it possible to stream those images directly into DMD Evaluation Boards ? (I can buy the suitable model which you inform) 

    Afterwise, I should process this image in a very short time to get phase data. 

    Q2 : Is it possible to process data via DMD Evaluation Board's FPGA ? 

    Finally, binary phase image should be directed into DMD. In total, all of the steps should be less than 5 miliseconds.

    Q3 : Is it possible to direct data from FPGA to DMD ? 

    Q4 : If not, what is the fastest way to direct data from PC to DMD ? 

    I hope we can find a suitable solution. Thanks again.

    Gorkem.

  • Hello Gorkem,

    You wrote:

    Q1 : Is it possible to stream those images directly into DMD Evaluation Boards ? (I can buy the suitable model which you inform) 

    Afterwise, I should process this image in a very short time to get phase data. 

    The system will be looking for a 60 or 120 Hz stream of RGB data from your source,  Moreover, the system will be expecting the native resolution of the DMD.  However, this will NOT meet your requirement of 1 kHz

    Q2 : Is it possible to process data via DMD Evaluation Board's FPGA ? 

    This FPGA is fairly small and is dedicated to splitting the received data for the two halves of the DMD.

    Finally, binary phase image should be directed into DMD. In total, all of the steps should be less than 5 milliseconds.

    All of your processing will need to be done on the PC side and then sent over Display Port or HDMI to the board.  On the newer DLPLCR900DEVM it is possible to connect directly to the RGB bus.  You would need to pack the RGB data into video frames and use Video Pattern mode to display these as binary images as outlined in the EVM guide.

    However, please note that the minimum time from one binary pattern to the next is 105 μs in Video Pattern mode.

    Q3 : Is it possible to direct data from FPGA to DMD ? 

    The FPGA already sends the pattern data to the two controllers.  It is dedicated to sending the two halves of the image to each controller from the RGB bus.  The dual DLPC900 architecture does not contemplate changing the programming of the FPGA.  

    Q4 : If not, what is the fastest way to direct data from PC to DMD ? 

    The method(s) outlined above will be the fastest way for this platform, since the data is real-time.

    I hope this helps you understand this platform?

    Fizix

  • Dear Fizix,

    Wholeheartedly thanks from my side. Now I am confident on DMD product line.

    Maybe for the future versions from your side, that would be great if there would be a EVM which can use high data speed links(USB3.2, CoaXPress etc) as an input with an advanced FPGA(Xilinx, Altera etc) for direct data modulation on EVM. Just dreaming :)

    Greetings.

    Gorkem. 

  • Gorkem,

    My apologies, somewhere in replying to #1, I failed to get a "NOT" in answer.  It was supposed to read, "However, this will NOT meet your requirement of 1 kHz."

    I am sorry for any inconvenience.

    Fizix