This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DLPC910: PWR_FLOAT pin connection

Part Number: DLPC910
Other Parts Discussed in Thread: TIDA-00570, DLPC410


Designing with the DLPC910. 

looking at the datasheet (DLPS064D – SEPTEMBER 2015 – REVISED SEPTEMBER 2020". for PWR_FLOAT pin, it is stated that " Park DMD mirrors."...and nothing more. 

looking into document (TIDA-00570 High Speed DLP Sub-system DLPC910 Main Board) - DLPC910 Sample Design schematics, this pin is connected through a NAND gate. 

My question is, Is it needed in the DLPC910 to use the NAND gate? this demand appears on the DLPC410 datasheet which we use also (and there exist a difference from datasheet which states NOR and EVM which utilizes NAND). 

Appreciate your help

  • Hello Moshe,

    The intent here is to park the mirrors at the request of the APPS_FPGA or if the power monitor sees that the power has gone away.  We would recommend using the NAND gate to ensure that the mirrors are parked either way.  If you are not going to use the power monitor this way and ensure another method of watching power which will send this signal through your front end, then it may be possible to eliminate the NAND gate.