Part Number: DLPLCRDC4422EVM
Hello all,
we want to set up the DLPLCRDC4422EVM with DLP470EVM to display an image from the V-by-one input. Image output from ASIC works fine (various patterns from TPG, Splash).
However, we see no image yet when connecting our own Vx1 source. We emit 600 MHz Pixel clock (not the often used 594), and the timing (freely programmable on our image source) matches Timing #3 (3840x2160_60) from DLP470TE_Vx1_Input_Video_Timings.xlsx. Colour depth is 10 bits per colour as supported by DLPC4422 EVM. A 4k LC panel (InnoLux M280DGJ-L30) displays the test image correctly.
Next we tested the FPGA TPG and also don't see an image. Settings (applied via DLP GUI) are:
On the "Display" page, projection mode is set to "EXTERNAL".
On the "FPGA Control Page":
- FPGA UHD TPG is set to "240Hz_4XPR", then, unter "FPGA UHD Mode Status", both "Is XPR ON" and "Is TPG ON" are checked.
- Tried different FPGA TPG Patterns, but no image with neither of them.
*** What looks strange to me is that on the "Source" page under "Source Desctiption":
- "Active Display" is always "SFG", when changing this to "EXTERNAL", the "Datapath State" entry goes to "LOOK_FOR_SYNCS", and "Active Display" goes back to "SFG" after a few seconds.
I would assume that "Active Display" should be "EXTERNAL" when I set "EXTERNAL" as Projection Mode in the Display page, and "Datapath State" should be "MONITOR_SOURCE", is that correct?
Thank you for any advice on how to proceed,
Matthias
