Other Parts Discussed in Thread: DLP9000X,
Hi,
We are working new board controlling on DLPC910 and DLP9000X.
We are receiving DDC Version of "2" (OK) and DMD Type of "F" (also OK).
1. Left side mirrors of DMD looks different from Right side
2. we send training pattern and INIT_ACTIVE goes low.
3. we send first frame (1600 rows) followed by MCP --> RST_ACTIVE goes high and stays high --> In the right half of the DMD mirrors changed as expected, In the left side mirrors changed but to something unknown (seems different in the top and bottom side)
4. we tried to send PWR_FLOAT and still Right side of the mirrors and the left side looks different.
we tested DLP900X voltages, DCLKOUT_A - DCLKOUT_D (400MHZ), SCTRL_A - SCTRL_D and they seems OK
We are trying to understand if we are dealing with logic design issues or HW issues, from your experience what could be the problem?