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DLP3021LEQ1EVM: SPI communication with DLP from other boards

Diego aneiros
Prodigy 20 points
Part Number: DLP3021LEQ1EVM

Hello,

I`m trying to communicate to the DLP3021LEQ1EVM via SPI in mute Host mode and when sending frames with the SPI protocol and the frames provided in the FPGA users guide I receive no response.

For example in order to flip the image I´m changing the FTM_FLIP Register (Address 0x20);

This is the Frame the DLP Control Program sends, being the green signal the CLK and the yellow signal the MOSI;

And this is what I send from another Board;

Yet the DLP doesn´t sends any response when sending the frame from other board, (the CS signal is low level when sending the frame).

Is there any other document for further information on how to communicate to the dlp from other boards?

Regards,

Diego

  • 0
    TI__Mastermind 27940 points

    Hi Diego,

    The DLP3021-Q1 FPGA User's Guide contains all of the SPI interface details you need to know.

    A few items you should double check:

    • Set the EVM to host mute mode. You should see a blue LED in the on-state of the EVM to indicate host mode is active. If you can use DLP Control Program successfully in this mode, then you are in the correct mode.
    • Ensure your host controller is set in the SPI_MODE=0, the bit order is MSB first, and the clock speed is 5MHz or slower. (see table 21 of the FPGA UG).
    • For write cmd: Ensure you are sending 8 bytes total: {CMD, ADDR LSB, ADDR MSB, DATA3, DATA2, DATA1, DATA0, Checksum}. (see figure 6 of FPGA UG). For read cmd: see figure 7.
    • The checksum is calculated as an 8 bit checksum modulo 256.

    To see an example of the host payload, you can use DLP Control Program, and review the Command Log. To set the DMD SFLP, the transmit data to set in this case is shown as 0x{00, 20, 00, 01, 00, 00, 00}. In this case the checksum byte is missing from transmit data in the log, but is calculated as 0x21.

    If you still have errors after ensuring the above, you may need to use a logic analyzer to capture the SPI transaction for further debug.