DLPC3437: the way to burn FPGA SPI FLASH

the video input of FPGA uses GM8775C to convert MIPI to dual 8-bit LVDS to drive FPGA, leaving out the lowest bit of each group: (FPD0_ AP/AN and FPD1_ AP/AN), as shown in the figure before, which is different from the  0.33 male board DLPDLCR3310EVM. Please provide the corresponding FPGA software according to our hardware configuration.

According to the 0.33 male board DLPDLCR3310EVM， the FPGA is driven by  RGB888（PDATA0-23,H,V,DE,CLK） . If the signal is input through the LVDS channel (dual 8-bit LVDS, leaving out the FPD0 and FPD1_ AP/AN,), will the FPGA automatically detect and switch to this channel under the default software?

Hello,

It is highly unlikely that the FPGA will adjust for this, but I will check in with the team to confirm. I should note that many of my colleagues are unavailable during this holiday season. It may be January before I have a reply.

Regards,

Austin