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DLPLCRC900DEVM: Serialize

Part Number: DLPLCRC900DEVM
Other Parts Discussed in Thread: DLPC900

Hi Team,

A customer want to serialize the LVDS output 4 x 16-bit LVDS data can you suggest what SerDes can be used for it? also what is LVDS data output rate form the DLPLCRC900DEVM?

Regards,

Marvin

  • Hello Marvin,

    What is the DLPLCRC900DEVM being used for in this case? Can you clarify the end goal? A SerDes is not commonly used with this particular EVM because the DLPC900 does not use an FPGA.

    Best,

    Maxine

  • Hi Maxine,

    Heres more information:

    The plan is to replace 2 X 150-pin cables with a 2 x 50-pin cables. The cables that come with the dev kit are thick and expensive and the customer have been trying to find a way to replace them.

    in their design, they have two boards: a DMD formatter board and a DMD board. This setup will require cables. Is there a way to use some other cables if  they want to go with the DLPC900 chips?is there an off-the-shelf IC available to Serialize/Deserialize the 4 x 16-bit LVDS interface without using an FPGA.

  • Marvin,

    The dual controller DMD interface has 4 buses (A,B,C,D) each with 18 differential LVDS pairs (16 x D_*, 1 x SCTRL_*, 1 x DCLK_*).  DCLK is generally 400MHz.  One would need to keep the DCLK to Data & SCTRL timing relationship (setup/hold) with any solution.

    In addition, there is an important system timing relationship between the DMD Data interface and the LVCMOS Micromirror Reset Control signals (RESET_ADDR*, RESET_MODE*, RESET_SEL*, and RESET_STROBE) that needs to be maintained.  If you add a latency to the DMD Data Interface, you need to add the same latency to the Micromirror Reset Control interface as well.

    We are not aware of any off-the-shelf solution to serialize this interface.  

    A number of customers have used micro-coaxial and/or twin-axial cables (I-PEX, KEL TMC Series, and others).  These can often be ordered with the wires bundled, making for a less bulky cable interface. 

    Regards,
    Gary