Other Parts Discussed in Thread: DLP230NP, DLPDLCR230NPEVM
Hello,
I have some experience working with other DLPC + DLP combos, and I am wondering what for this particular chip-set the application diagram of the datasheet shows and FPGA to interface with the AP. If the AP already has all GPIOs, I2C, and SubLVDS interface, why to use the FPGA? And if it is due to format conversion, is there any sample code for the FPGA to follow? Or what is the best documentation to get full details to implement this solution. Thanks
Augusto