Other Parts Discussed in Thread: DLPLCR4500EVM
Hello
I need to display a 2880Hz video (120Hz x 24 bits x 1-bit pattern) with the DLP LightCrafter 4500 development module (DLPLCR4500EVM) and its DLPC350 controller. The video to be displayed is generated with an external FPGA.
My problem is that nothing is displayed after the configuration is done.
The validate command does not return any error (value is 0x00).
The input signal is 1140x912 (I also tried 912x1140) @ 120Hz on the 24bits port with a 149MHz pixel clock.
Do you have any suggestion or idea to help me solve this problem?
Thank you.
The controller is configured via I2C as below but I tried multiple other configurations:
Register : 0x69; // Display Mode Selection Command
Value : 0x01; // 1 = Pattern display mode
Register : 0x6F; // Pattern Display Data Input Source
Value : 0x00; // 0 = Pattern display data streams through the 24-bit RGB/FPD-link interface
Register : 0x75; // 0x75 Pattern Display LUT Control
Value (byte 0): 0x00;
Value (byte 1): 0x01;
Value (byte 2): 0x17;
Value (byte 3): 0x00;
Register : 0x70; // Pattern Trigger Mode Selection
Value : 0x00; //0 = Pattern Trigger Mode 0: VSYNC triggers the pattern display sequence
Register : 0x66; // Pattern Exposure Time and Frame Period
Value (byte 0): 0x8D; //Exposure =8.3ms
Value (byte 1): 0x20;
Value (byte 2): 0x00;
Value (byte 3): 0x00;
Value (byte 4): 0x8D; //Period = 8.3ms
Value (byte 5): 0x20;
Value (byte 6): 0x00;
Value (byte 7): 0x00;
Register : 0x77; // Open mailbox (Pattern Display LUT Access Control)
Value : 0x01;
Register : 0x76; // Pattern Display LUT Offset Pointer
Value : 0x00;
Register : 0x78; // Pattern Display LUT Data
Value (byte 0): 0x61; // Internal trigger + 24 patterns
Value (byte 1): 0x71;
Value (byte 2): 0x04;
Register : 0x77; // Close mailbox (Pattern Display LUT Access Control)
Value : 0x00;
Register : 0x7D; // 0x7D Validate Data Command Response
Value : 0x00;
+ Read 0x7D
Register : 0x65; // 0x65 is Pattern Display Start/Stop Pattern Sequence
Value : 0x02; // 0b10 = Start pattern display sequence