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DLPLCRC410EVM: Frame Rate and Control

Part Number: DLPLCRC410EVM
Other Parts Discussed in Thread: DLPLCR65NEVM, , DLPC410

 We are using the DLPLCRC410EVM with the DLPLCR65NEVM for an application requiring a framerate of minimum 30 Hz, but ideally up to 1 kHz. It does not require many images - only a handful - but does need to cycle through those at the specified speed. After installation and testing and scouring the datasheets, we realized the DLP Discovery 4100 GUI only supports 7-10 Hz. Upon reading the forums, many people have had similar issues and have inquired, but I did not find any clear answer as to the frame rates that are available using the Discovery 4100 Development platform via ActiveX or DLL control directly (as opposed to the GUI). I also could not find any documentation on how to setup a software platform in order to actually use the ActiveX/DLL API. I read the API programmer's guide of course, but there are no setup instructions. What is the feasible framerate using ActiveX or DLL? 

Many of the answers to the related questions on the forums stated that the FPGA would need to be reprogrammed with a memory block in order to accomplish similar things, but those posts had what in my opinion were higher requirements. I am assuming this is referencing the Discovery 4100 APPSFPGA? The Discovery 4100 User Guide states that the APPSFPGA is already connected to memory, is this not the case? Assuming that we add a memory module and controller, is it possible to interact with that controller via the Discovery 4100 software commands or would we also have to develop new DLL functions to interface with it?

If this is not the case and the only option we have is to develop our own FPGA firmware, do I need to get the referenced Xilinx DLC9G programming cable or can it be programmed over USB? I see that to program the PROM which loads the FPGA on startup the Xilinx programmer is needed, but in the API guide there is the command {Short DownloadAPPS_FPGACode(LPCTSTR FileName)} which is described as loading the FPGA with a new program. I am assuming this means the FPGA can be programmed via USB, but given my initial misunderstanding about the framerates advertised in the datasheet, I want to make sure I am clear as to what we will need to do in order to realize our design.

Thank you!

  • Hello Nathan, 

    Thanks for reaching out and using the E2E Forums! I'm putting one of our team members in contact with you now and they will reach out to you as soon as possible.

    Best,
    Tristan Bottone

  • Hello Nathan,

    The DLPC410 does not have enough FIFO memory to load a full DMD image for any of the supported DMD EVMs.  Anything that runs over the USB 2.0 interface (ActiveX/DLL) simply does not have sufficient bandwidth to run any faster than about 7-10Hz.

    The GUI over USB was never intended as a frame display solution, but rather as a way to demonstrate that the hardware is physically working.

    The answers are correct that you will need to do FPGA development, attach memory to the SODIMM slot, generate a memory interface in the IDE application, to access data faster than USB.

    The Discovery software is not designed to interact with any attached memory.  There is some confusion around what the guide means when it says that the APPS_FPGA is already connected to memory.  The board is has a SODIMM connector which is attached to the APPS_FPGA, but is not populated.  So "connected" means that the APPS_FPGA has connections to the SODIMM slot.

    As an off the shelf solution, ViALUX makes turnkey systems that already has the functionality you want, but it is not open source. Dli in the US re-sells their hardware.  This solution allows you to load up the memory with patterns and then you can send command to load various patterns that are in memory.  They can definitely reach 1K binary patterns per second.

    For the APPS_FPGA it is possible to use the GUI interface to load a new *.bin file to the APPS_FPGA, but it is volatile.  If you want it to remain from boot to boot you will need to create a *.mcs file to program into the PROM attached to the APPS_FPGA.

    NOTE:  Be sure to save a copy of what is already in the APPS_FPGA PROM using the Impact tool before blowing it away.

    Sorry for any confusion on this.

    Fizix

  • Fizix,

    Thank you for the comprehensive response. This makes the requirements for development much more clear and I appreciate the thoroughness.

    I have one remaining question for this. Assuming we will develop our own FPGA code and flash it using the DLP Discovery software. It seems we will need to be able to use the DLL or ActiveX controls in order to do so (as opposed to the supplied GUI).

    I imagine we will also need to code new DLL commands in order to communicate with the developed memory controller via USB.

    I am still not clear on what software setup is required to directly compile and run a script that uses DLL/ActiveX and I cannot find documentation on it. I see on the forums some people accomplish this using Labview, are there other options or any sort of setup documentation available?

    Thank you,

    -Nathan

  • Nathan,

    It is not required to use the DLL / ActiveX interface, but many of the hooks are already there.

    The Code for the GUI interface was written on MS Visual Studio - originally it was version 2008, but I think version 2 of the GUI is on version 2012.

    You will need to explore the Cypress (now Infineon) tools to interface to the on board (EVM) interface.  

    You may be better off to write it on their latest tools.  The EZ USB that it was originally written on is now deprecated.  I expect you will have better luck writing your interface (GUI) in C++ or C# (maybe using QT for graphics).

    The newer Infineon tools (FX2 I think) should have interface DLLs to interface with.  I am not a fan of ActiveX.

    I know it is a lot of information and a lot of work.  That is why I also suggested the turnkey system for now.

    Fizix