Hi All,
Our DLPC1438 board can't display the image from ISP interface. After our debug, we find out the "Memory intialization not done" information from FPGA Status page of composer.
And sometimes the Memory Initialization become "done" after we reboot the power or projection on. We do check the BGA soldering of FPGA and DDR, but we do not find any problem so far.
The power level and the noise of FPGA and DDR are checked and all voltage levels match spec.
Does anyone have about this experience can provide the debugging direction to us?
By the way, our schematic refer to A2 version of reference design.
